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This paper presents a discussion on several methods that can be used to improve the testability of mixed-signal integrated circuits. We begin by outlining the role of test, and its impact on product cost and quality. A brief look at the pending test crises for mixedsignal circuits is also considered. Subsequently, we shall outline several common test strategies, and their corresponding test set...

The number of Advanced Driver Assistance Systems (ADAS) in future vehicle generations will increase steadily in order to support drivers by means of comfort-, safetyand ecology-functions. Along with the ascent of ADAS functions, the challenge for developers to prove the safety and reliability of the overall system increases. The risk for people and test equipment involved in potentially dangero...

Existing high-level BIST synthesis methods focus on one objective, minimizing either area overhead or test time. Hence, those methods do not render exploration of large design space, which may result in a local optimum. In this paper, we present a method which aims to address the problem. Our method tries to find an optimal register assignment for each k-test session. Therefore, it offers a ran...

This paper presents an attempt towards design quality improvement by incorporating of self-testability features during dada path (high-level) synthesis. This method is based on the use of test resource sharing possibilities to improve the self-testability of the circuit. This is achieved by incorporating testability constraints during register assignment. Experimental results are presented to d...

There is a dilemma between, on the one hand, easily and straightforwardly acquiring and integrating external, prefabricated, cost-effective, plug & play components and, on the other hand, the strong need for assessing and possibly accepting these components so that their incorporation into in-house products is not the source of any damage. This paper supplies some technical leads based on the c...

The need for specifying robust built-in test for systems is growing as systems become more complex. Further, detection-only BIT—the predominant form of BIT—is insufficient to meet the needs of system test on current and future systems; localization and even isolation is becoming essential. In response to this need, several computerbased analysis tools have become available that provide the abil...

This work was supported by the JESSI project AE11. Abstract Using on-chip fault detection measures the Fail-Stop Controller AE11 was developed for safety critical applications aiming at high volume production of automotive and railway electronics. The trade-off between high defect coverage, short reaction time to faults and low chip area overhead results in a combination of Concurrent Checking,...

A low-cost on-line test scheme for digital filters, capable of providing an off-line BIST solution, is proposed. The scheme utilizes an invariant of the digital filter in order to detect possible circuit malfunctioning on-line and shares most of this on-line checking hardware with off-line BIST. The analysis performed indicates that 100% fault secureness & 100% fault coverage are possible, if c...