Accurate timing analysis of digital integrated circuits is becoming harder to achieve with current and future CMOS technologies. The shrinking feature sizes lead to increasingly important local process variations (PV), making existing methods like corner-based static timing analysis (STA) yield overly pessimistic results. In this paper we propose a general purpose statistical circuit simulator ...

The oscillation-test strategy is a low cost and robust test method for mixed-signal integrated circuits. Being a vectorless test method, it allows one to eliminate the analog test vector generator. Furthermore, as the oscillation frequency is considered to be digital, it can be precisely analyzed using pure digital circuitry and can be easily interfaced to test techniques dedicated to the digit...

A new configuration realizing water quality monitoring device using ISFET involving low power CMOS Integrated “Ion Sensitive Field Effect transistor (ISFET)—Operational Amplifier is presented. The study’s main focus is on simulation of power and performance analysis of ISFET device, which is used for water quality monitoring. This approach can improve calibration of device to a fairly wide rang...

Subthreshold source-coupled logic (STSCL) circuits can be used in design of low-voltage and ultra-low power digital systems. This article introduces and analyzes new techniques for implementing complex digital systems using STSCL gates with an improved power-delay product (PDP) based on source-follower output stages. A test chip has been manufactured in a conventional digital 0.18μm CMOS techno...

In this paper, the adoption of general metrics of the energy-delay tradeoff is investigated to achieve energyefficient design of digital CMOS very large-scale integrated circuits. Indeed, as shown in a preliminary analysis on the performance of various commercial microprocessors, a wide range of Ei D j metrics is typically adopted. Physical interpretation and interesting properties for the desi...

This paper describes a programmable fuzzy controller chip designed with mixed-signal IC techniques. Its input and output signals are analog to directly interact with the information from the real world. The programmability interface is digital and the output signal is also given in digital format to allow easy embedding into digital processing environments. Experimental results from a prototype...

C omplementary-metal-oxide-semiconductor (CMOS), active-pixel-sensor (APS), digital camera-on-a-chip technology has progressed rapidly in the six or so years since it was invented by scientists at the NASA Jet Propulsion Laboratory (Pasadena, CA; see Fig. 1). While performing the same general image-capture function as its predecessor, the charge-coupled device (CCD), this highly integrated "sys...

This paper presents a new general purpose neuro-fuzzy controller to realize adaptive-network-based fuzzy inference system (ANFIS) architecture. ANFIS which tunes the fuzzy inference system with a back propagation algorithm based on collection of input-output data makes fuzzy system to learn. To implementing this idea we propose several improved CMOS analog circuits, including Gaussian-like memb...

A novel approach to testing CMOS digital circuits is presented that is based on an analysis of IDD switching transients on the supply rails and voltage transients at selected test points. W e present simulation and hardware experiments which show distinguishable characteristics between the transient waveforms of defective and non-defective devices. These variations are shown to exist for CMOS o...

A novel electrostatic discharge (ESD) protection device with a threshold voltage of 0V for complementary metal-oxide semiconductor (CMOS) integrated circuits in sub-quarter-micron CMOS technology is proposed. Quite different to the traditional ESD protection devices, such an active ESD device is originally standing in its turn-on state when the IC is zapped under ESD events. Therefore, such an ...