A recently proposed method obtains path delay fault coverages by estimating the count of the number of tested faults instead of actually enumerating them. The estimate become pessimistic when several paths share a set of lines. In this communication, we present a continuum of improved approximations for the counting method, approaching exact fault simulation, to allow trade-o s between accuracy...

Industry 4.0 and Cyber Physical Production Systems (CPPS) are often discussed and partially already sold. One important feature of CPPS is fault tolerance and as a consequence self-configuration and restart to increase Overall Equipment Effectiveness. To understand this challenge at first the state of the art of fault handling in industrial automated production systems (aPS) is discussed as a r...

Random testing requires each test to be selected randomly regardless of the tests previously applied. This paper introduces the concept of antirandom testing where each test applied is chosen such that its total distance from all previous tests is maximum. This spans the test vector space to the maximum extent possible for a given number of vectors. An algorithm for generating antirandom tests ...

In this paper we present a method the uses classical test coverage criteria for graphs, such as, all-edges, all nodes, and simple paths, to guide the testing of PageFlow graphs. The coverage criteria of the PageFlow graphs are applied to Actions/Pages and Forwards/Links of a web application.

This paper presents a method for minimizing test suites for embedded, nondeterministic Finite State Machines. The method preserves the fault coverage of the original test suite, and can be used in conjunction with any technique for generating test suites. The minimization is achieved by detecting and deleting redundant test cases in the test suite. The proposed method is an extension of the wor...

In corrective maintenance, selective regression testing includes test selection from previously run test suite and test coverage identification. We propose three reductionbased regression test selection methods and two coverage McCabe-based identification metrics. We empirically compare these methods with other three reduction and precision-oriented methods using 60 test-problems. The compariso...

This paper presents a Design-for-Test (DfT) approach for folded ADCs. A sensor DfT circuit is designed to sample several internal ADC test points at the same time, so that, by computing the relative deviation among them the presence of defects can be detected. A fault evaluation is done considering a behavioral model to compare the coverage of the proposed test approach with a functional test. ...

We present a scaling methodology to improve iDDT fault coverage in random logic circuits. The study targets two iDDT test methods: Double Threshold iDDT and Delayed iDDT . The effectiveness of the scaling methodology is assessed through physical test measurements, and studied relative to process variation and impact on circuit performance. The scaling is made possible using a clustering methodo...

We present a method for testing sequential circuits using weighted random sequences. The weights are stored and a weighted random sequence generator is used to produce the required test sequences during testing rather than storing the actual test sequences themselves. The generation of required weights is based on the dynamic scan algorithm, DYNASTEE. Experimental results demonstrate new tradeo...

Self testing of integrated circuits by random patterns has several technical and economical advantages. But there exists a large number of circuits which cannot be randomly tested, since the fault coverage achieved that way would be too low. In this paper we show that this problem can be solved by unequiprobable random patterns, and an efficient procedure is presented compu ting the specific op...