Run-time reconfiguration provides an opportunity to increase performance, reduce cost and improve energy efficiency in FPGA-based systems. However, run-time reconfigurable systems are more complex to implement than static only systems. This increases time to market, and introduces run-time overhead into the system. Our research aims to raise the abstraction level to develop run-time reconfigura...

Hardware verification on FPGAs runs more than three orders of magnitude faster than software simulations, however with much lower visibility into the design under test. To expedite the task of debugging and specification verification, we propose a tool framework that automates many tedious aspects of the process. We provide tools to mine assertions either from simulation or hardware traces, to ...

Power reduction in dynamic circuits became an important factor today. In this thesis, we designs an ALU using the popular power reduction techniques named clock gating and precomputation based sequential logic optimization for low power . It reduces the power consumption by reducing the dynamic switching power. Power reduction deals with synthesis, design at circuit level and placement and rout...

This article presents the new features of OmpSs@FPGA framework. OmpSs is a data-flow programming model that supports task nesting and dependencies to target asynchronous parallelism heterogeneity. extension addressed specifically FPGAs. environment built on top Mercurium source compiler Nanos++ runtime system. To address FPGA specifics implements several related as local variable caching, wide ...

many of the video processing algorithms cannot be implemented in real time on general computers, due to their computational complexity. for an efficient implementation, a custom hardware that can be reconfigured for the algorithm, is used. in this paper a new acceleration hardware based on fpga elements is proposed. this hardware can be adapted with the processing algorithm through fpga design ...

الگوریتم رمزنگاری aes یکی از متداول ترین الگوریتم های رمزنگاری متقارن است. به علت قابلیت های این الگوریتم، آن را می توان بر روی بسترهای مختلفی ازجمله بـر روی بسـترهای سخـت افزاری نظیر fpga پیاده سازی کرد. همچنین به علت ساختار الگوریتم می توان مسیر داده را به صورت چرخشی و یا غیر چرخشی پیاده سازی نمود. ازآنجاکه بسته به کاربرد، استفاده از هریک از این دو معماری تأثیر فراوانی بر میزان گذردهی و میزان...