-Silicon (Si) Gate-All-Around (GAA) MOSFETs offers full electrostatic control over the gate which makes them promising candidates for the next generation complimentary metal-oxide-semiconductor field-effect transistors (CMOS) devices. Due to variations in the growth condition, the cross-section of GAA MOSFETs is often elliptical instead of being perfectly circular. This elliptical cross section...

A linear stacked field-effect transistor (FET) power amplifier (PA) is implemented using a 0.18-μm silicon-on-insulator CMOS process for W-CDMA handset applications. Phase distortion by the nonlinear gate-source capacitance (Cgs) of the common-source transistor, which is one of the major nonlinear sources for intermodulation distortion, is compensated by employing a PMOS linearizer with improve...

Controlling tunneling properties through graphene vertical heterostructures provides advantages in achieving large conductance modulation which has been known as limitation in lateral graphene device structures. Despite of intensive research on graphene vertical heterosturctures for recent years, the potential of spintronics based on graphene vertical heterostructures remains relatively unexplo...

A pH sensor fabricated on a single chip by an unmodified, commercial 0.6m CMOS process is presented. The sensor comprises a circuit for making differential measurements between an ion-sensitive field-effect transistor (ISFET) and a reference FET (REFET). The ISFET has a floating-gate structure and uses the silicon nitride passivation layer as a pH-sensitive insulator. As fabricated, it has a la...

In this work, we report on the optimization of a double-gate silicon-on-insulator field effect device operation to maximize pH sensitivity. The operating point can be fine tuned by independently biasing the fluid and the back gate of the device. Choosing the bias points such that device is nearly depleted results in an exponential current response—in our case, 0.70 decade per unit change in pH....

Low temperature mobility measurements of silicon-on-insulator ~SOI! metal-oxidefield-effect-transistors are reported. The batch of devices fabricated in this work includes both ultrathin and thick devices for which the SOI film thicknesses are in the ranges of 10–15 nm and 56–61 nm, respectively. The 4.2 K peak mobility of the thick devices is 1.9 m/V s. The ultrathin devices show mobility degr...

We measure gate-tuned thermoelectric power of mechanically exfoliated Bi2Se3 thin films in the topological insulator regime. The sign of the thermoelectric power changes across the charge neutrality point as the majority carrier type switches from electron to hole, consistent with the ambipolar electric field effect observed in conductivity and Hall effect measurements. Near the charge neutrali...

In this paper we experimentally explore the gate length scaling effects that related to the abrupt degradation of electrostatic discharge (ESD) robustness for ultra-thin body silicon on insulator (SOI) devices and integrated circuits (ICs). It is found that, for the ultra-thin body SOI, the ESD protection devices fail when the gate length of protection devices is smaller than the 0.18 micron me...

Silicon on insulator (SOI) devices have been of great interest in these years. In this paper, simulation with density-gradient transport model is performed to examine the variation of threshold voltage (VTH) for double gate SOI MOSFETs. Different thickness of silicon (Si) film, oxide thickness, channel length and doping concentration are considered in this work. According to the numerical study...

Low operation voltage organic thin film transistors (OTFTs) were successfully fabricated with top contact structure at low fabrication temperature. The thin gate dielectric of OTFTs were deposited by atmospheric pressure plasma jet at the substrate temperature about 150 °C and under atmospheric pressure. The environment of processes would significantly improve the abilities of large area applic...