ModelMaker is a tool being developed to help modelers rapidly develop behavioral models from natural language descriptions to support the construction of virtual prototypes. This tool analyzes documents for behavioral patterns and constructs a component and signal index for search and retrieval of relevant text. The tool’s interface features an edit window for HDL model development and a source...

In this paper we review how hardware has been described in the formal hardware veriication community. Recent developments in hardware description are evaluated against the background of the use of hardware description languages, and also in relation to programming languages. The notions of structure and behaviour are crucial to this discussion.

In this paper we review how hardware has been described in the formal hardware veriication community. Recent developments in hardware description are evaluated against the background of the use of hardware description languages, and also in relation to programming languages. The notions of structure and behaviour are crucial to this discussion.

This paper describes the use of model-based diagnosis for locating bugs in hardware designs. We restrict our view to hardware designs written in a subset of the commonly used hardware description language VHDL. This subset includes all synthesizeable (register transfer level) programs. This are programs which can be automatically converted into a gate level description without changing their be...

The ever increasing complexity of digital hardware, forces the hardware designer to switch from a low-level capture-andsimulation process to a high-level design-and-synthesis process. In order to assist the designer during the specification phase, we designed MODES, a new high-level specification environment. MODES integrates graphical specification capture in various behavioural representation...

This paper presents Cyclic code Encoder and Decoder with its soft core design as well hardware implementation on FPGA. The design includes both encoder and decoder part that can be used in a communication system for encoding a message at the transmitter and decoding it, detecting error and correcting it on the receiver part. The source code for Encoder and Decoder has been formulated in VHDL ( ...

Architecture. The development of a flexible very-large-scale integration (VLSI) for GA has been proposed in this paper. For the hardware architecture, we has develop on a random number generator (RNG), crossover, and mutation based on flexibility structure. This structure can dynamically perform to the 3 types chromosome encoding: binary encoding, real-value encoding, and integer encoding. The ...

We present a hardware synthesis system that accepts system-level speciications in both Verilog HDL and C. A synchronous semantics is assumed for both languages in order to guarantee a uniform underlying model. The rationale for mixed input speciications is to support hardware/software co-design by allowing the migration to hardware of system modules originally described in the C language. We di...

− In this paper, a self-organizing learning array (SOLAR) and its hardware-software (HW/SW) co-simulation are presented. In SOLAR, every neuron maximizes its information index during feed forward self-organizing learning. SOLAR was simulated on benchmark examples and showed good ability to learn exceeding the performance of many traditional classifier algorithms. A simple HW/SW co-simulation me...

CλaSH, a functional hardware description language based on Haskell, has several abstraction mechanisms that allow a hardware designer to describe architectures in a short and concise way. In this paper we evaluate CλaSH on a complex DSP application, a Polyphase Filter Bank as it is used in the ASTRON APERTIF project. The Polyphase Filter Bank is implemented in two steps: first in Haskell as bei...