نتایج جستجو برای: majority logic synthesis
تعداد نتایج: 723093 فیلتر نتایج به سال:
Further downscaling of CMOS technology becomes challenging as it faces limitation of feature size reduction. Quantum-dot cellular automata (QCA), a potential alternative to CMOS, promises efficient digital design at nanoscale. Investigations on the reduction of QCA primitives (majority gates and inverters) for various adders are limited, and very few designs exist for reference. As a result, de...
Approximate computing represents a modern design paradigm that allows systems to have imprecise or inexact execution, aiming optimize circuit area, performance, and power dissipation. The automatic construction of approximate integrated circuits (IC) is performed through computer-aided (CAD) tools available in electronic automation (EDA) frameworks. logic synthesis (ALS), particular, treats two...
A median (antimedian) of a profile of vertices on a graph G is a vertex that minimizes (maximizes) the sum of the distances to the elements in the profile. The median (antimedian) function has as output the set of medians (antimedians) of a profile. It is one of the basic models for the location of a desirable (obnoxious) facility in a network. The median function is well studied. For instance ...
The synchronized bit communication model, defined recently by Impagliazzo and Williams in [1], is a communication model which allows the participants to share a common clock. The main open problem posed in this paper was the following: does the synchronized bit model allow a logarithmic speed-up for all functions over the standard deterministic model of communication? We resolve this question i...
New proofs are given for Monjardet’s theorem that all strong simple games (i.e., ipsodual elements of the free distributive lattice) can be generated by the median operation. Tighter limits are placed on the number of iterations necessary. Comparison is drawn with the χ function which also generates all strong simple games.
Reliability information provided by sets of orthogonal check sums in a majority logic decoder for block codes is used in a type-I hybrid ARQ error control scheme. The reliability information is obtained through a simple modification of the majority logic decoding rule. It is shown that the reliability performance of Reed-Muller and other majority logic decodable codes can be substantially impro...
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