Large scale atomistic simulations are feasible only with classical effective potentials. Nevertheless, even for classical simulations some ab-initio computations are often necessary, e.g. for the development of potentials or the validation of the results. Ab-initio and classical simulations use rather different algorithms and make different requirements on the computer hardware. We present perf...

Today’s Voltage Regulator Modules (VRMs) face increasing design challenges as the number of transistors in microprocessors increases per Moore’s Law. These challenges have recently become even more demanding as microprocessors operate at sub voltage range at significantly high current. This paper presents a new multiphase topology with cell configuration for improved performance in low voltage ...

Soft errors due to cosmic particles are a growing reliability threat to information systems. In this work, a methodology is developed to analyze the effects of single event upsets (SEU) and obtain Failure In Time (FIT) rates for commercial server microprocessors in live information systems. Our methodology is based on data collected from error logs and error traces of the microprocessors collec...

A set of algebraic tools for microprocessors (Harman and Tucker [1995a], Harman and Tucker [1994], Fox and Harman [1996b]) are extended to accommodate superscalar processors, where instructions may be executed in parallel, or out of program order. This has implications for the representation of timing abstraction, the relationship between time at different levels of abstraction, and the concept...

In 2009 we described a hands-on approach to teaching microprocessors in which students handwired a Z80-based microprocessor system and programmed it in machine code. The construction of the microprocessor system was accompanied by lectures in a variety of topics including computer organization, instruction set architectures, the Intel family of microprocessors, and high-speed techniques such as...

The property of Positive Equality [2] dramatically speeds up validity checking of formulas in the logic of Equality with Uninterpreted Functions and Memories (EUFM) [4]. The logic expresses correctness of high-level microprocessors. We present EVC (Equality Validity Checker)—a tool that exploits Positive Equality and other optimizations when translating a formula in EUFM to a propositional form...

As we know that Microprocessors is a device which can perform the operation in microseconds. Each generation of processors grows a small type, but faster dissipated more heat and more consumed the power. A number of techniques such as data levels of parallelism, instruction levels of parallelism, thread level parallelism and simultaneous multi threading (SMT) already exists which make the big i...

In the year 1965, Gordon E. Moore, Co-founding father of Intel, made a remark that number transistors in an integrated circuit doubled about each 2 years which as result will increase computation power exponentially and size also maintains decreasing. As get efficient, computer systems emerge smaller faster. The faster microchip approaches electric indicators, performance pc with growth micropr...

One of the key aspects correctness memory subsystem a microprocessor is its functioning in accordance with coherence protocol. This article presents an approach to test program generation for verification “Elbrus” microprocessors. Requirements tests are considered. The map structure allowing describe areas used and types accesses these flexible way presented. method based on described. automati...

Multithreaded architectures have been proposed for future multiprocessor systems due to their ability to cope with network and synchronization latencies. Some of these architectures depart signiicantly from current RISC processor designs, while others retain most of the RISC core unchanged. However, in light of the very low cost and excellent performance of oo-the-shelf microprocessors it seems...