Multiple Valued Logic (MVL) has some important benefits such as increased data density, increased computational ability, reduced dynamic power dissipation Therefore with the help of Multiple Valued Logic (MVL) we have designed two quaternary multiplier architecture. The partial products in the multiplier are designed with quaternary voltage mode circuits. Each multiplier architecture is designe...

An adiabatic logic is a technique to design low power digital VLSI’s. This paper describes the design and VLSI implementation of a multiplier using a two phase drive adiabatic dynamic CMOS logic (2PADCL) circuit. Circuit operation and performance have been evaluated using a 4×4-bit 2PADCL multiplier fabricated in a 1.2 μm CMOS process. The experimental results show that the multiplier was opera...

Palindromic representation is generally used to reduce space and time complexities in Gaussian normal basis (GNB) multiplier with even type t. However, palindromic representation is inapplicable for a GNB multiplier with odd type t (t ≥ 2). This study therefore develops a palindromic-like representation for a GNB multiplier with odd type t. The proposed systolic GNB multiplier with odd type t r...

A study and comparison between current mode CMOS analog multiplier, CMOS current mode multiplier/divider and high frequency four quadrant current multiplier has been carried out in this paper. Current multiplier has been simulated in SPICE with 0.35μm, 0.5μm. Simulation have been done with supply voltage of 3.3V, 1.5V and 1.55V respectively. The simulated results show that characteristic of mul...

Background modeling is an important step in moving object detection and tracking. In this paper, we propose a new statistical approach in which, a sequence of frames are selected according to velocity and direction of some moving objects and then an initial background is modeled, based on the detection of gray pixel's value changes. To have used this sequence of frames, no estimator or distribu...

In this paper, we introduce the notion of a frame in a 2- inner product space and give some characterizations. These frames can be considered as a usual frame in a Hilbert space, so they share many useful properties with frames.

an evolutionary structural optimization (eso) method is used for plastic design of frames. based on safe theorems some criteria are derived and made an effort to satisfy them during the optimization process. in this regard, equilibrium is checked and yield condition is gradually satisfied during the optimization process. in this method, the amount of used material and the stiffness for each ele...

In this paper, efforts are made to compare the safety of steel moment resistant frames designed according to different editions of the Iranian code of Practice for seismic resistant design of buildings. Also, failure risk of a low and medium height frame which designed for high and low seismicity regions according to three editions of the code are evaluated. First, the testing cases were design...

Reversible logic has attracted tremendous interest among the researchers in low power VLSI field due to their simple structure and improved energy efficiency. In this paper, the implementation of an 8-bit low power multiplier based on reversible gate technology is reported. The structure of the reversible gate multiplier consists of following components: the first part is the reversible partial...