The Microsoft Windows 2000 implementation of Kerberos introduces a new encryption type based on the RC4 encryption algorithm and using an MD5 HMAC for checksum. This is offered as an alternative to using the existing DES-based encryption types. The RC4-HMAC encryption types are used to ease upgrade of existing Windows NT environments, provide strong cryptography (128-bit key lengths), and provi...

Predicate encryption has an advantage over traditional publickey or identity-based encryption, since predicate encryption systems provide more flexible control over access to encrypted data. We focus on delegation capabilities in predicate systems. More specifically, we investigate delegatable encryption systems supporting disjunctive predicate evaluations. We present formal security definition...

In order to protect the security of network data, a high speed chip module for encrypting and decrypting of network data packet is designed. The chip module is oriented for internet information security SOC (System on Chip) design. During the design process, AES (Advanced Encryption Standard) and 3DES (Data Encryption Standard) encryption algorithm are adopted to protect the security of network...

This paper presents our industrial experience on the implementation of SpeedyDes3 encryption which is a speed up version of the Des3 encryption. This SpeedyDes3 encryption improves the standard Des3 encryption by means of speed and memory usage. Our SpeedyDes3 encryption is particular suitable for use/running in small systems. We have applied the SpeedyDes3 for the encryption of data in video p...

A Cloud data storage system consists of collection of storage servers over the internet which provides long term storage services. The data stored in a third party’s cloud system may cause serious concern over data confidentiality. To keep sensitive user data confidential against un-trusted servers and to provide security, access control in cloud there are some cryptographic techniques speciall...

A system-on-a-chip (SoC) contains several pre-designed heterogeneous megacells that have been designed and routed optimally. In this paper a new stochastic net-length distribution for global interconnects in a nonhomogeneous SoC is derived using novel models for netlist, placement, and routing information. The netlist information is rigorously derived based on heterogeneous Rent’s rule, the pla...

Xilinx PLANAHEAD provides RTL to bitstream hierarchical design flow with new user interface and project management capabilities. Partial reconfiguration (PR) is a technique which optimizes utilization of resources of Static Random Access Memory (SRAM) based FPGA dynamically i.e on the fly configuration. In this paper the authors reconfigures some specific regions during runtime [2]. The tool wh...

Power has become major design concern for complex VLSI circuits today. Designer needs tool(s) that accurately estimate the power dissipation in a given design. We need two categories of tools that are useful for this purpose. One is power optimization tools and, second is an analysis tool for estimating the power consumption in an existing netlist. This approach addresses the second issue by em...

Spectral geometric embeddings of a circuit netlist can lead to fast, high quality multi-way partitioning solutions. Furthermore, it has been shown that d-dimensional spectral embeddings (d > 1) are a more powerful tool than single-eigenvector embeddings (d = 1) for multi-way partitioning [2] [4]. However, previous methods cannot fully utilize information from the spectral embedding while optimi...

ion Refinement Himanshu Jain1, Daniel Kroening2, Natasha Sharygina1,3, and Edmund Clarke1 1 Carnegie Mellon University, School of Computer Science 2 ETH Zuerich, Switzerland 3 Informatics Department, University of Lugano Abstract. As first step, most model checkers used in the hardware industry convert a high-level register transfer language (RTL) design into As first step, most model checkers ...