Early test development and specification enhance the quality and robustness of software as experience with new agile software development methods shows. The methods propagate test-first techniques and early prototyping through executable design models. For UML, Model-Driven Architecture is oriented towards executable models. Several authors propose scenarios specified by sequence diagrams as te...

88 0740-7475/03/$17.00 © 2003 IEEE Copublished by the IEEE CS and the IEEE CASS IEEE Design & Test of Computers WELCOME TO DAC WATCH, a special section commemorating the 40th year of the Design Automation Conference, held 2-6 June 2003 in Anaheim, California. Inside, you will find a perspective on 40 years of DAC from Cadence and Synopsys founder Alberto SangiovanniVincentelli, plus interviews ...

Appliances are increasingly controlled by microprocessors. Unfortunately, energy test procedures have not been modified to capture the positive and negative contributions of the microprocessor to the appliance’s energy use. A new test procedure is described, which captures both the mechanical and logical features present in many new appliances. We developed an energy test procedure for refriger...

Contents Summary vii Acknowledgments ix Symbols xi Abbreviations xiii 1 Introduction 1 1.

It is important to recognize that several years of hands on experience are required for one to become a true test expert. However, it is critical to ensure that students are equipped with the skills that will make them successful designers when they leave their academic institutions. Fundamentals of VLSI design and testability would provide them with a solid foundation to build upon going forward.

Tests of design fluency (DF) assess a participant's ability to generate geometric patterns and are thought to measure executive functions involving the non-dominant frontal lobe. Here, we describe the properties of a rapidly administered computerized design-fluency (C-DF) test that measures response times, and is automatically scored. In Experiment 1, we found that the number of unique patterns...

This paper describes test ready core design methodology for TeakLite core. Implementation issues and techniques about test access with minimal test pins, scan chain reconfiguration, and UDL test capability are presented. Testability enhancement for development of high quality test vector is also described. As the result, a very high fault coverage of 99.68% has been achieved. We also present th...

Introduction Microelectromechanical Systems (MEMS) has existed as a technical field since the early 1980’s. Past research has primarily focused on developing new process technologies to support specific applications. As stable process technologies have emerged, many research efforts have shifted towards the design of systems containing hundreds or even thousands of mixeddomain components. As a ...

Silicon technologies advances brought the possibility of integrating billions of transistors in a VLSI die. However, as these transistors become smaller due to fabrication method enhancements, some aspects that were negligible in older technologies emerge as difficulties for the design in current and future technology nodes. In this context, fully synchronous digital circuits become harder to b...