This paper investigates the effect of lowering the supply and threshold voltages on the energy efficiency of CMOS circuits. Using a first-order model of the energy and delay of a CMOS circuit, we show that lowering the supply and threshold voltage is generally advantageous, especially when the transistors are velocity saturated and the nodes have a high activity factor. In fact, for modern subm...

In the ultra low power end of design spectrum when performance is of secondary importance, digital subthreshold logic circuits are more applicable than the regular MOS logic. In this paper, we propose two different subthreshold logic families: 1) variable threshold voltage subthreshold CMOS (VT-Sub-CMOS) and 2) subthreshold dynamic threshold voltage MOS (SubDTMOS) logic. Both these logic famili...

In the cellular network with relays, the mobile station can benefit from both coverage extension and capacity enhancement. However, the operation complexity increases as the number of relays grows up. Furthermore, in the cellular network with cooperative relays, it is even more complex because of an increased dimension of signal-to-noise ratios (SNRs) formed in the cooperative wireless transmis...

One of the much-debated novel features of theories with extra dimensions is the presence of power-like loop corrections to gauge coupling unification, which have the potential of allowing a significant reduction of the unification scale. A recognized problem of such scenarios is the UV sensitivity of the above power corrections. We consider situations where the grand unified group is broken by ...

: The hyperbolic form of the power-duration relationship is rigorous and highly conserved across species, forms of exercise, and individual muscles/muscle groups. For modalities such as cycling, the relationship resolves to two parameters, the asymptote for power (critical power [CP]) and the so-called W' (work doable above CP), which together predict the tolerable duration of exercise above CP...

In this brief paper, the dependency of short-circuit power on threshold voltage is analyzed and utilized for short circuit (SC) power reduction in multi-threshold (MTCMOS) processes. Analytical expressions are developed for estimation of the change of ratio between short-circuit power and dynamic power (PSC/Pdyn) while changing the design process. The analysis shows that the PSC/Pdyn ratio can ...

Digital circuit design is streamlined process used to improve the performance of a circuit for a particular application. Fast speed, minimum power dissipation and less area are the desirable characteristics of a digital circuit, in general. To meet a particular standard of speed, a compromise in power dissipation and speed is required. Timing elements such as Flip-flop are used as clock generat...

one can ask is whether there is an efficient. way t.o simulate a network of LTEs with big weight.s by a network of LTEs with small weights. We prove the following results: 1) every LTE with big weights can be simulated by a depth-3, polynomial size network of LTEs with small weights, 2) every depth-d, polynomial size network of LTEs with big weights can be simulated by a depth-(2d+ 1), polynomi...

..................................................................................................................................... iii Acknowledgements ..................................................................................................................... iv Dedication .................................................................................................................

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