This paper describes ongoing work on the automatic construction of formal models from Real-Time implementations. The model construction is based on measurements of the timed behavior of the threads of an implementation, their causal interaction patterns and external visible events. A specification of the timed behavior is modeled in timed automata and checked against the generated model in orde...

Current parallelizing compilers cannot identify a signiicant fraction of parallelizable loops because they have complex or statically insuuciently deened access patterns. We advocate a novel framework for the identiication of parallel loops. It speculatively executes a loop as a doall and applies a fully parallel data dependence test to check for any unsatissed data dependencies; if the test fa...

The use of transputer family microprocessors in hard real-time control applications is studied. The transputer offers computing performance and architectural features like support of process scheduling and multiprocessing on hardware and language level. Some of these features are efficient for real-time systems, but some contradict with the system performance. Occam process structure is matched...

The data structure SPQR-tree represents the decomposition of a biconnected graph with respect to its triconnected components. SPQR-trees have been introduced by Di Battista and Tamassia [8] and, since then, became quite important in the field of graph algorithms. Theoretical papers using SPQR-trees claim that they can be implemented in linear time using a modification of the algorithm by Hopcro...

This work presents an analytic solution to a 2-D waveguide mesh, made square with input and output at the center to produce a symmetry that reduces redundancy and increases computational savings. The result is a frequency-domain representation of the mesh, a parametric transfer function describing the ratio of output to input, symbolically computed to retain parameters. In this form, the mesh, ...

This paper presents our experience implementing the memory management extensions in the Real-Time Speciication for Java. These extensions are designed to given real-time programmers the control they need to obtain predictable memory system behavior while preserving Java's safe memory model. We describe our implementation of certain dynamic checks required by the Real-Time Java extensions. In pa...

Recently we have proposed the ”almost ASAP” semantics as an alternative semantics for timed automata. This semantics is useful when modeling real-time controllers : control strategies modeled with this semantics are robust and implementable (without making the synchrony hypothesis). We show in this paper how to effectively encode this semantics using timed automata along with their classical se...