The emergence of artificial intelligence (AI) driven keyword spotting (KWS) technologies has revolutionized human to machine interaction. Yet, the challenge end-to-end energy efficiency, memory footprint and system complexity current neural network (NN) powered AI-KWS pipelines remained ever present. This paper evaluates KWS utilizing a learning automata algorithm called Tsetlin Machine (TM). T...

BACKGROUND & AIMS Systemic cellular immunity elicited by the Ty21a oral typhoid vaccine has been extensively characterized. However, very limited data are available in humans regarding mucosal immunity at the site of infection (terminal ileum [TI]). Here we investigated the host immunity elicited by Ty21a immunization on terminal ileum-lamina propria mononuclear cells (LPMC) and peripheral bloo...

In this paper we illustrate the features and study the applicability of transactional memory (TM) as an efficient and easy-to-use alternative for handling memory conflicts in multi-theaded physics simulations that use shared memory. The tool used for our preliminary analysis of this novel construct is IBM’s freely available Software Transactional Memory (STM) system. Instead of attempting to ap...

This paper describes the Transmogrifier-2 (TM-2), a second-generation multifield programmable gate array (FPGA) rapid-prototyping system. The largest version of the system will comprise 16 boards that each contain two Altera 10K50 FPGA’s, four I-Cube interconnect chips, and up to 8 Mbytes of memory. The inter-FPGA routing architecture of the TM-2 uses a novel interconnect structure, a nonunifor...

Male and female college students played the commercial game Memory TM, which required them to recall the location of previously viewed items, and also completed a 20item mental rotation task. As is typical, males performed better than females (d = .67) on the mental rotation task. In contrast, females outperformed males by a large margin (d = .89) on the memory task. Performance on the two task...

Transactional memory (TM) is a novel approach for handling concurrency issues. By experimenting on a prototype system implementing transactional memory in hardware, we aim at investigating if TM is of benefit for scientific and high-performance computing. The main goal of our work is to exploit the optimistic nature of transactional memory and increase performance by reducing the overhead from ...

In this paper we present the design and implementation of an MPSoC built to explore tradeoffs in multicore design space and to evaluate parallel programming proposals such as Transactional Memory (TM). Our flexible system, comprised of MIPS R3000-compatible cores is easily modifiable to study different architecture, library and operating system extensions. For this paper we evaluate a 16-core H...

Direct Memory Access Translation (DMTRANS) is a theory of translation developed at CMT of CMU in which translation is viewd as an integrated part of cognitive processing. In this paradigm, understanding in source language is a recognition of input in terms of existing knowledge in memory and integration of the input into the memory. Context of sentences are established as what is left in memory...

There has been significant research on performing runtime monitoring of programs using dynamic binary translation (DBT) techniques for a variety of purposes including program profiling, debugging, and security. However, such software monitoring frameworks currently handle only sequential programs efficiently. When handling multithreaded programs, such tools often encounter racing problems and r...