Clouds forming during the summer monsoon over the Indian subcontinent affect its evolution through their radiative impact as well as the release of latent heat. While the latter is previously studied to some extent, comparatively little is known about the radiative impact of different cloud types and the vertical structure of their radiative heating/cooling effects. Therefore, the main aim of t...

Introduction Conclusions References Tables Figures ◭ ◮ ◭ ◮ Back Close Full Screen / Esc Abstract Introduction Conclusions References Tables Figures ◭ ◮ ◭ ◮ Back Close Full Screen / Esc Abstract The impact of convection on the thermal structure of the Tropical Tropopause Layer (TTL) was investigated from a series of four daily radiosonde ascents and weather S-band radar observations carried out ...

A new CMOS active pixel image sensor is reported. The sensor uses a 2.0 p n double-poly, double-metal foundry CMOS process and is realized as a 128 x 128 array of 40 p n x 40 pm pixels. The sensor features TTL compatible voltages, low noise and large dynamic range, and will be useful in machine vision and smart sensor applications.

This paper shows that timetable construction is NP-complete in a number of quite different ways that arise in practice, and discusses the prospects of overcoming these problems. A formal specification of the problem based on TTL, a timetable specification language, is given.

This paper presents a simple 4-bit computer processor design that may be built using TTL chips for less than $65. In addition to describing the processor itself in detail, we discuss our experience using the lab kit and its associated machine instruction set to teach computer architecture to high school students.

This document describes measures to protect the BGP sessions itself such as Time to Live (TTL), the TCP Authentication Option (TCP-AO), and control-plane filtering. It also describes measures to better control the flow of routing information, using prefix filtering and automation of prefix filters, max-prefix filtering, Autonomous System (AS) path filtering, route flap dampening, and BGP commun...

When designing a computer with TTL logic circuits, the delays of logic paths have been estimated by considering the number of gate delays and adding in load and media factors. Such a simplistic approach is not accurate enough for calculating delays when designing high-performance large systems using high-speed, non-saturating circuits such as HCML (Honeywell's Current Mode Logic). There are sev...