C. A. Stafford,1,2,3 F. Kassubek,1,2,3 J. Bürki,1,4,5 and Hermann Grabert3 1Physics Department, University of Arizona, 1118 E. 4th Street, Tucson, Arizona 85721 2Institute for Theoretical Physics, University of California, Santa Barbara, California 93106-4030 3Fakultät für Physik, Albert-Ludwigs-Universität, Hermann-Herder-Straße 3, D-79104 Freiburg, Germany 4Institut de Physique Théorique, Uni...

On top of the passively secure extension protocol of [IKNP03] we build a new construction secure against active adversaries. We can replace the invocation of the hash function that is used to check the receiver is well-behaved with the XOR of bit strings. This is possible by applying a cut-and-choose technique on the length of the bit strings that the receiver sends in the reversed OT. We also ...

Microcoded customized IPs offer superior performance and direct programmability of micro-architectural structures compared to instruction-based processors, yet at the cost of drastically enlarged code sizes. Code compression can deliver size reductions but necessitates attention to performance issues, so that the performance benefits of microcoded IPs are not squandered in the process. To attai...

The spectral information of a Boolean function provides data regarding the correlation between the input variables and the output of the function. This paper introduces a spectral based methodology for com-binational logic synthesis using linear transforms. An analysis of the properties of the spectra obtained from these transforms is provided and a synthesis algorithm using spectral techniques...

We study the circuit complexity of linear transformations between Galois fields GF(2) and their isomorphic composite fields GF((2)). For such a transformation, we show a lower bound of Ω(mn) on the number of gates required in any circuit consisting of constant-fan-in XOR gates, except for a class of transformations between representations of such fields which are nicely characterized. The excep...

By using the memristor’s memory to both store a bit and perform an operation with a second input bit, simple Boolean logic gates have been built with a single memristor. The operation makes use of the interaction of current spikes (occasionally called current transients) found in both memristors and other devices. The sequential time-based logic methodology allows two logical input bits to be u...

There are two major approaches to the synthesis of logic circuits. One is based on a predominantly algebraic factorization leading to AND/OR logic optimization. The other is based on classical Reed-Muller decompositionmethod and its related decision diagrams, which have been shown to be efficient for XOR-intensive arithmetic functions. Both approaches share the same characteristics: while one i...

We report experimental results obtained with a circuit possessing dynamic logic architecture based on one of the theoretical schemes proposed by H. Peng and collaborators in 2008. The schematic diagram of the electronic circuit and its implementation to get different basic logic gates are displayed and discussed. In particular, we show explicitly how to get the electronic NOR, NAND, and XOR gat...

In this paper we investigate the properties of self induced transparency (SIT) solitons, propagating in a Λ-type medium. We find that the interaction between SIT solitons can lead to trapping with their phase preserved in the ground state coherence of the medium. These phases can be altered in a systematic way by the application of appropriate light fields, such as additional SIT solitons. Furt...

Different logic families have been proposed from several years to improve the performance of the high speed circuits. Mostly used logic family is CMOS which requires equal number of nMOS and pMOS transistor but in some application it may be required to reduce the area. Pseudo nMOS logic is one of the alternative for that .In this paper, NOR-XOR, NAND-XOR and other combinational circuit using ps...