A low voltage and power current differencing transconductance amplifier (CDTA) based on Floating gate MOSFET (FGMOS) Quasi-floating (QFGMOS) is presented. The use of QFGMOS eliminates confined in the floating gate, degraded gain-bandwidth product, silicon area etc. proposed circuits have been simulated using spice simulation software 180nm technology analog devices LtSpice XVII supply used for ...

A high performance FGMOS based current mirrors at low supply voltage is proposed in this paper. A combination of floating gate and CMOS technology is used to design this new simple current mirror at low supply voltage of 0.5V using 180nm CMOS technology. Very low input impedance of 14Ω with increased input voltage swing. In addition to accurate current copy, a very high output impedance of 5GΩ ...

In this paper a scheme is proposed for generating a programmable current reference which can be implemented in the CMOS technology. The current can be varied over a wide range by changing an external voltage applied to one of the control gates of FGMOS (Floating Gate MOSFET). For a range of supply voltages and temperature, CMOS current reference is found to be dependent, this dependence is comp...

Current mirror (CM) is the basic building block in analog and mixed mode circuit design. For high performance analog circuit applications, the current transfer ratio, output impedance and output swing are the most important parameters to determine the performance of the current mirror. CM’s are important for analog integrated circuits because of their wide use as constant sources or active load...

We describe a family of current-mode circuits with multiple inputs and multiple outputs whose output currents are products and/or quotients of powers of the input currents. These circuits are made up of multiple-input oating-gate MOS (FGMOS) transistors operating in the subthreshold regime. The powers are set by capacitor ratios; hence, they can be quite accurate. We analyze the general family ...

We discuss the possibility of developing high-quality oating-gate memories and circuits in digital CMOS technologies that have only one layer of polysilicon. Here, the primary concern is whether or not we can get adequate control-gate linearity from MOS capacitors. We employ two experimental proceedures to address this issue and nd acceptable oating-gate circuit behavior with MOS capacitors. Fi...

In this paper floating gate MOS (FGMOS) along with sleep transistor technique and leakage control transistor (LECTOR) technique has been used to design low power SRAM cell. Detailed investigation on operation, analysis and result comparison of conventional 6T, FGSRAM, FGSLEEPY, FGLECTOR and FGSLEEPY LECTOR has been done. All the simulations are done in Cadence Virtuoso environment on 45 nm stan...