NAND flash is a key storage technology in modern computing systems. Without it, many devices would probably not exist today or would at least not benefit from as many features. The very large success of this technology motivated massive efforts to scale it down in order to increase its density further. However, NAND flash is currently facing physical limitations that prevent it reaching smaller...

die and beyond with MLC (two bit per cell) technology with 50nm and 40nm process nodes. Despite this impressive growth of bit density, program performance of NAND Flash has remained in 10MB/s range. As consumer’s need for more digital contents grows, companies are paying more attention to improve program and read performance of NAND Flash devices to meet the consumer’s appetite for more bits an...

NAND flash memory has become an indispensable component in embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cos,t and high density. Even though NAND flash memory gains popularity as data storage, it also can be exploited as code memory for XIP (execute-in-place). In this paper, we present a cost-efficient memory architecture which incorpora...

NAND flash memory does not support the overwrite operation and thus it deploys the flash translation layer which performs the out-place update. When designing a flash translation layer, memory consumption, computation complexity, and garbage collection overhead should be low. However, the representative sector mapping scheme of flash translation layer, FAST causes a huge computation complexity ...

-Flash memory has more capacity and less weight. It makes it more suitable for electronic media. Electronics such as tablet PC and smart phones use NAND flash memory as a secondary storage because it has many attractive features such as small size, fas t access speeds, and light weight. However, it has shown limited success in its battle against the hard disk, due to intrinsic weak points of: e...

NAND flash memory based storage devices use Flash Translation Layer (FTL) to translate logical addresses of I/O requests to corresponding flash memory addresses. Mobile storage devices typically have RAM with constrained size, thus lack in memory to keep the whole mapping table. Therefore, mapping tables are partially retrieved from NAND flash on demand, causing random-read performance degradat...

The design of on-chip error correction systems for multilevel code-storage NOR flash and data-storage NAND flash memories is concerned. The concept of trellis coded modulation (TCM) has been used to design on-chip error correction system for NOR flash. This is motivated by the non-trivial modulation process in multilevel memory storage and the effectiveness of TCM in integrating coding with mod...

The raw bit error rate of NAND Flash memory increases as the semiconductor geometry shrinks for high density, which makes it very necessary to employ a very strong error correction circuit. The soft-decision-based error correction algorithms, such as low-density parity-check (LDPC) codes, can enhance the error correction capability without increasing the number of parity bits. However, soft-dec...

The density of NAND flash grows at the price of significantly reduced reliability. To enable the continued scaling of flash memory more fundamental changes are needed. In this paper, we show that existing flash is much more reliable by adopting the rank modulation (RM) scheme [2]. RM encodes data using the relative orders of memory cell voltages, which is inherently resilient to asymmetric erro...

Introduction Multi-Level Cell (MLC) technology greatly reduces flash die size to achieve a breakthrough cost structure. It does this by storing 2 bits of data per physical cell instead of the traditional 1 bit per cell, using Binary flash technology. But the increased density of the MLC flash media has grave consequences in terms of data reliability and performance. A number of flash vendors, w...