This paper introduces an automated circuit design system for the evolution and subsequent invention of CMOS amplifiers. The proposed system relies on a mix of genetic programming and a new topologyindependent design optimisation method referred to as current-flow analysis. Genetic programming evolves new circuit topologies from the collection of primitive devices and basic building blocks. Curr...

This study proposes a gradient-free approach to integrated circuit sizing that takes into account the statistical variations of device parameters and ranges of operating conditions. A novel gradient-free algorithm for solving the worst-case performance problem is proposed. The proposed algorithm produces corners that are used in the optimisation loop of the circuit sizing process. The set of co...

The design of high speed circuits and optimization in function of technological and geometrical parameters are presented. MUX-driver design and optimization for 40 Gb/s ETDM transmission illustrate the proposed approach. The impact of collector thickness (WC) on driver performances is evaluated and assessed by circuit fabrication and measurements. 40 Gb/s electrical measurements of the realized...

One of the hardest practical problems in computer science is the problem of gate-efficient implementation. Such optimizations are particularly important in industrial hardware implementations of standard cryptographic algorithms. In this paper we focus on optimizing some small digital circuits such as S-boxes in some well-known ciphers. We consider the notion of Multiplicative Complexity which ...

Abstract Noisy, intermediate-scale quantum (NISQ) computers are expected to execute circuits of up a few hundred qubits. The have conform NISQ architectural constraints regarding qubit allocation and the execution multi-qubit gates. Quantum circuit compilation (QCC) takes nonconforming outputs compatible circuit. Can classical optimisation methods be used for QCC? Compilation is known combinato...