New designs of recursive digital differentiators are obtained by optimizing a general fourth-order recursive digital filter over different Nyquist bands. In addition, another design of recursive digital differentiators is also obtained by optimizing the specified pole-zero locations of existing recursive digital differentiator of second-order system. Further, new designs of recursive digital in...

| The design of an audio rate, second order sigma-delta analog-to-digital converter is presented. The converter achieves a peak SNDR of 95 dB and consumes 382 W ( gure of merit is 0.19). Careful signal scaling saves power and prevents integrator overloading.

The rotating coil technique is extensively used in high-precision measurements for accelerator magnet testing. One of most relevant error sources is the drift arising from the integrator offset. In this paper, a correction algorithm for the offset drift in digital integrators is presented. Preliminary experimental results for the measurement correction of the main field of a superconducting dip...

We characterize general symplectic manifolds and their structure groups through a family of isotropic or symplectic submanifolds and their diffeomorphic invariance. In this way we obtain a complete geometric characterization of symplectic diffeomorphisms and a reinterpretation of symplectomorphisms as diffeomorphisms acting purely on isotropic or symplectic submanifolds. DOI: 10.1134/S008154380...

Delta-sigma modulation for analog-to-digital conversion resolves a number of bits logarithmic in the number of modulation cycles, and linear in modulation order. As an alternative to higher-order noise shaping, we present an algorithmic scheme that iteratively resamples the modulation residue, by feeding the integrator output back to the input. This yields a bit resolution linear in the number ...

281 ABSTRACT: DDC (Digital Down Converter), as a key part of digital receivers, aims to get low-speed digital baseband signals by extracting and filtering the digital signals transformed by high-speed ADC (Analog Digital Conversion). This paper employs the multi-rate process technique to design the DDC, i.e. firstly conducting data CIC (Cascade Integrator Comb) extraction, then HBF (HalfBand Fi...

This paper proposes a built-in self-test (BIST) scheme for noise-tolerant testing of a digital-to-analogue converter (DAC). The proposed BIST calculates the differences in output voltages between a DAC and test modules. These differences are used as the inputs of an integrator that determines integral nonlinearity (INL). The proposed method has an advantage of random noise cancelation and achie...