This paper presents the modeling and simulation of a 833.33 kS/s, 51.279μW successive approximation register(SAR) Analog to Digital Converter(ADC) using 0.18μm CMOS technology that uses internally generated signal for approximation for low power applications. The ADC is powered by single supply voltage of 1V. In our scheme, comparator output time and bit settling time of the Digital to Analog C...

Introduction Digital-to-analog converters (DACs) are usually used as an interface between digital systems and continuous analog circuitry. To choose the type of DAC best suited for an application, the designer must consider many important performance measures. • Resolution: Generally, a DAC is specified by the number of bits in the input, or the input width, which represents the number of volta...

We present a broadband coherent orthogonal frequency-division multiplexing (OFDM) transceiver based on sampling and low bandwidth electronic analog signal processing. Wideband superchannels, without any guardband are aggregated from OFDM channels in the time domain by Nyquist sinc-pulse sequences with rectangular bandwidth. Therefore, method is called OFDM-Nyquist-time division (TDM). Simulatio...

High Dynamic Range Audio is the next frontier in audio reproduction. Bel Canto is achieving dynamic range greater than 125dB using our new DAC architecture. Achieving high dynamic range in the audio playback system removes the errors that typically compromise the sonic quality and sense of realism that a playback system can achieve. This dynamic range needs to start from the Digital to Analog c...

Partial randomization dynamic element matching (DEM) was recently introduced as a promising DEM technique for low harmonic distortion digital-to-analog conversion. The DEM technique is well suited for applications such as direct digital synthesis in wireless communication systems for which low hardware complexity is essential in addition to low harmonic distortion. Previously reported simulatio...

DAC (Digital to Analog Converter) is the enabling inverse technology of ADC that generates analog output proportionate to given digital input. In most of the control and digital processing system requires the DAC for meddlesome with real world. But most of the digital controlling microprocessor and microcontroller don’t have an on chip DAC integrated peripheral architecture. For such implementi...

A 6-bit, 7 mW, 700 MS/s subranging ADC using Capacitive DAC (CDAC) and gate-weighted interpolation fabricated in 90 nm CMOS technology is demonstrated. CDACs are used as a reference selection circuit instead of resistive DACs (RDAC) for reducing settling time and power dissipation. A gate-weighted interpolation scheme is also incorporated to the comparators, to reduce the circuit components, po...