نتایج جستجو برای: fast adder
تعداد نتایج: 231887 فیلتر نتایج به سال:
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses “flagged prefix addition” to merge rounding with the significand addition. The floating-point adder is implemented in 0:5 m CMOS, measures 1:8mm2, has a 3-cycle latency and implements all rounding modes. A modified version of this floating-point adder can perform accumulation in 2-...
Design of a high performance and high-density multiplier is presented. This multiplier is constructed by using the Wallace tree structure with pipelining. A fast carry select adder is used for the final two-operand adder. It is shown that the time delay for the entire multiplier is O(log(n)). The design is particularly carried out for a 32-bit multiplier with two sections of pipelining, to bala...
To design the power and area proficient fast speed data path logic systems, the field of very large scale integration (VLSI) is the generally significant area of research where minimize the area and power is the more difficult task. In digital system, mostly adders lie in the crucial paths that affect the whole performance of the system. To perform the fast arithmetic functions in many data pro...
In performing fast arithmetic functions, Carry select adder (CSLA) is one of used in many data processing processors to perform fast arithmetic functions. Adders are the basic building blocks in digital integrated circuit based designs. Ripple carry adders are slowest adders as every full adder must wait till the carry is generated from previous full adder. CSLA (SQRT CSLA) architecture have be...
Any digital processing performed on a signal with larger nyquist interval requires more computation than signal processing performed on smaller nyquist interval. The sampling rate alteration generates the unwanted effects in the system such as spectral aliasing and spectral imaging during signal processing. Multirate-multistage implementation of digital filter can result a significant computati...
In this paper, we propose a novel multiplexer-based full adder design, denoted as MUXFA, by using regular modules for arithmetic applications. The MUXFA full adder is composed of three identical modules, in which each module separately operates for XOR-XNOR function, sum function, and carry function. The structure of the multiplexer-based full adder can be easily constructed by merely a single ...
RC4 Stream cipher is well known for its simplicity and ease to develope in software. But here, in the proposed design we have heighlighted the modified hardware implémentation of RC4. As RC4 is the most popular stream cipher. The proposed design performs reading and swapping simultaneously in one clock cycle. The proposed design also highlights the adder part which enhances the architecture spe...
Low Power circuits play a significant role in designing large-scale devices with high energy and power consumption. Adiabatic are one such energy-saving that utilize reversible power. Several methodologies used previously infer the use of CMOS for reducing dissipation logic circuits. However, hardly manage maintaining their performance when it comes to fast switching networks. technology is emp...
Binary addition is one of the most important arithmetic function in modern digital VLSI systems. Adders are extensively used as DSP lattice filter where the ripple carry adders are replaced by the parallel prefix adder to decrease the delay. The requirement of the adder is fast and secondly efficient in terms of power consumption and chip area. Speculative variable latency adders have attracted...
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