We investigate the effect of a small leakage current through the gate insulator on the stability of organic single-crystal field-effect transistors sFETsd. We find that, irrespective of the specific organic molecule and dielectric used, leakage current flowing through the gate insulator results in an irreversible degradation of the single-crystal FET performance. This degradation occurs even wh...

We propose an on-demand single-photon source for quantum cryptography using a metal–insulator–semiconductor quantum dot capacitor structure. The main component in the semiconductor is a p-doped quantum well, and the cylindrical gate under consideration is only nanometres in diameter. As in conventional metal–insulator–semiconductor capacitors, our system can also be biased into the inversion re...

Scaling of the Ino,52AI,,,,As insulator thickness of In,,~s2AI,,1,As/n+-Ine,s3Gao.J,As MIS-type FET’s is found experimentally to result in a drastic drop in performance below 200 A. This is demonstrated to arise from an increase in the sheet resistance of the extrinsic portions of the device that accompanies insulator scaling. In order to solve this problem, a recessed-gate MISFET with a very t...

Article history: Received 25 May 2015 Received in revised form 23 June 2015 Accepted 29 June 2015 Available online xxxx

In this work, we explore the gate oxide thickness influence on the Gate Induced Floating Body effect (GIFBE). This study was performed through two-dimensional numerical simulations and electrical measurements. The available devices are from 130nm and 65nm Silicon-On-Insulator (SOI) MOSFET technologies. The GIFBE and threshold voltage are evaluated as function of the gate oxide thickness reducti...

We describe the use of spectroscopic ellipsometry and other characterization techniques for gate oxide process metrology in manufacturing of CMOS transistors for the 130 nm node and beyond. Specifically, we describe the difficulties associated with the introduction of silicon-on-insulator (SOI) substrates, alternative gate dielectrics (silicon oxynitride or metal oxides), and strained Si channe...

Silicon-based CMOS technology can be scaled well into the nanometer regime. High-performance, planar, ultrathin-body devices fabricated on silicon-on-insulator substrates have been demonstrated down to 15-nm gate lengths. We have also introduced the FinFET, a double-gate device structure that is relatively simple to fabricate and can be scaled to gate lengths below 10 nm. In this paper, some of...

The effect of gate length on the operation of silicon-on-insulator (SOI) MOSFET structure with a layer of buried silicon oxide added to isolate the device body has been simulated. Three transistors with gate lengths of 100, 200 and 500 nm are simulated. Simulations show that with a fixed channel length, when the gate length is increased, the output drain current characteristics slope is increas...

We report on infrared (IR) spectromicroscopy of the electronic excitations in nanometer-thick accumulation layers in field-effect transistor (FET) devices based on poly(3-hexylthiophene). IR data allows us to explore the charge injection landscape and uncovers the critical role of the gate insulator in defining relevant length scales. This work demonstrates the unique potential of IR spectrosco...