Single Electron transistor have high integration density, ultra-low power dissipation, ultra-small size, unique coulomb blockade oscillation characteristics which makes an attractive technology for future low power VLSI/ULSI systems. The Single Electron Transistor have extremely poor driving capabilities so that direct application to practical circuits is a yet almost impossible, to overcome th...

By a combination of graphene oxide and DNA, a universal platform was developed for integration of multiple logic gates to implement both half adder and half subtractor functions. A constant undefined threshold range between high and low fluorescence output signals was set for all the developed logic gates.

One of the most important tasks in design and manufacturing of integrated circuits is the testing phase. Distinguishing between faulty and fault free ICs is a difficult task Therefore, simulations are being done for different circuits to identify fault free and faulty circuits. The circuits include analog circuits, digital circuits &mixed signal circuits. Analog circuits like Low pass filter, H...

Abstract Nanophotonic arithmetic circuits requiring cascaded Boolean operations are difficult to implement due loss and footprint issues. In this work, we experimentally demonstrate plasmonic half-subtractor demultiplexer based on transmission-lines. Empowered by the unique polarization selectivity in surface plasmon modal behaviors, both realized without cascading. The of can be performed usin...

By exploiting the phenomena of optical switching, different logical and arithmetic operations can be performed. This paper presents a novel optimized design structures to perform addition subtraction two binary digits using electro-optic effect based Mach–Zehnder interferometer operating at 1460 nm in S band. The proposed are numerically simulated designed beam propagation method MATLAB softwar...

Under ideal conditions, Reversible logic gates produce zero power dissipation. So these can be used for low power VLSI design. This paper proposes a new reversible parallel adder/subtractor using 4*4 Reversible DKG gate that can work singly as a reversible full adder and a full subtractor. A serial adder/subtractor is also designed in this paper using Reversible Universal Shift registers and DK...