This paper describes a knowledge-based system for automatically synthesizing integrated circuit layouts for NMOS cells. The desired cell layouts are specified in terms of their general structural and functional characteristics. From these initial specifications, the system produces correct and CoriJpact cell layouts. The system performs this task by generating plan steps at different levels of ...

Domino logic is a CMOS-based evolution of the dynamic logic techniques. It allows a rail-to-rail logic swing. It was developed to speed up circuits. In integrated circuit design, dynamic logic (or sometimes clocked logic) is a design methodology in combinatorial logic circuits, particularly those implemented in MOS technology. This work is oriented towards implementing the domino logic circuits...

In analog hardware, numbers can be represented by the location of active components in a pattern of fuzzy logic variables. This coding scheme is called place coding. In this case, fuzzy rule circuits can be implemented by only a fuzzy AND gate made of one MOS transistor per input. This approach is demonstrated by an analog integrated circuit solving a non-linear control problem.

Despite many advantages of Field-Programmable Gate Arrays (FPGAs), they fail to take over the IC design market from Application-Specific Integrated Circuits (ASICs) for high-volume and even medium-volume applications, as FPGAs come with significant cost in area, delay, and power consumption. There are two main reasons that FPGAs have huge efficiency gap with ASICs: (1) FPGAs are extremely flexi...

There have been great advances in integrated circuits technology in recent years which have both made feasible and generated major interest in electronic circuits which employ more than two levels of signals. These circuits, called multiple valued logic circuits, offer several potential oppourtinities for the improvement of VLSI circuit designs. In this paper we review developments and potentia...

clock gating logic How can I formality check what inserted scan and clock gating? Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 04-01-2010 Full custom designs can achieve faster frequencies than standard cell approach. Hi, In Synopsys I have found that clock gating can be done using variety. The integrated clock gating logic can include a latch to latch a clock gating logic t...

This paper presents two highly integrated receiver circuits fabricated in InP heterojunction bipolar transistor (HBT) technology operating at up to 2.5 and 7.5 Gb/s, respectively. The first IC is a generic digital receiver circuit with CMOS-compatible outputs. It integrates monolithically an automatic-gain-control amplifier, a digital clock and data recovery circuit, and a 1 : 8 demultiplexer, ...

— We present a theoretical and a numerical formalism for analysis and design of spintronic integrated circuits (SPINICs). The formalism encompasses a generalized circuit theory for spintronic integrated circuits based on nanomagnetic dynamics and spin transport. We propose an extension to the Modified Nodal Analysis technique for the analysis of spin circuits based on the recently developed spi...

A 2-digit higher radix analog-to-digital converter (ADC) circuit consisting of a combination of a pipelined ADC and a set of cascaded current comparator cell has been proposed. The ADC generates multi-valued logic outputs rather than the conventional binary output system. The design is implemented using 0.25μm CMOS process. The performance analysis of the design shows desirable performance para...

One of the main problems preventing the large scale manufacturing of 3D integrated circuits is the difficulty in testing die and obtaining high yields. However, a 3D stack also provides new opportunities for repair. If a die containing programmable logic is included in the stack, it may be harnessed to bypass defective components of other dies. In this paper, we propose the use of an FPGA die t...