In this work, the design and analysis of new Level Shifter with Gate Driver for Li-Ion battery charger is proposed for high speed and low area in 180nm CMOS technology. The new proposed level shifter is used to raise the voltage level and significantly reduces transfer delay 1.3ns (transfer delay of conventional level shifter) to 0.15ns with the same input signal. Also, the level shifter with g...

This paper explores the dynamics of smallholder technology adoption, with particular reference to a high-yielding, low-external input rice production method in Madagascar. We present a simple model of technology adoption by farm households in an environment of incomplete financial and land markets. We then use a probit model and a symmetrically trimmed least squares estimation of a dynamic Tobi...

Delay-locked loop (DLL) and phase-locked loop (PLL) designs based upon self-biased techniques are presented. The DLL and PLL designs achieve process technology independence, fixed damping factor, fixed bandwidth to operating frequency ratio, broad frequency range, input phase offset cancellation, and, most importantly, low input tracking jitter. Both the damping factor and the bandwidth to oper...

An analog integrated circuit has been designed, in a BiCMOS 0.8 micron technology, for the feasability study of the signal processing of the AMS RICH photomultiplier tubes [1]. This low power, three channel gated integrator includes its own gate generator and no external analog delay is required. It processes PMT pulses over a dynamic range of 100. An external RC network allows it to work with ...

A complete procedure for the design of W-band low noise amplifier in MMIC technology is presented. The design is based on a simultaneously power and noise matched technique. For implementing the method, scalable bilateral transistor model parameters should be first extracted. The model is also used for transmission line utilized in the amplifier circuit. In the presented method, input/output ma...

Quantum-dot Cellular Automata (QCA) technology is attractive due to its low power consumption, fast speed and small dimension, therefore, it is a promising alternative to CMOS technology. In QCA, configuration of charges plays the role which is played by current in CMOS. This replacement provides the significant advantages. Additionally, exclusive-or (XOR) gate is a useful building block in man...

A new approach for designing an ultra wideband (UWB) CMOS low noise amplifier (LNA) is presented. The aim of this design is to achieve a low noise figure, reasonable power gain and low power consumption in 3.1-10.6 GHz. Also, the figure of merit (FOM) is significantly improved at 180nm technology compared to the other state-of-the-art designs. Improved π-network and T-network are used to obt...