The 29th International Symposium on Multiple-Valued Logic (ISMVL99) was held in Freiburg im Breisgau, Germany, May 20-22, 1999. The Symposium was co-sponsored by the Albert-Ludwigs-Universität Freiburg (or University of Freiburg), and the IEEE Computer Society Technical Committee on Multiple-Valued Logic. Two invited addresses and 42 contributed papers were presented by MVL researchers from aro...

Multiple-valued logics [2] provide an interesting alternative to classical boolean logic for modeling and reasoning about systems. By allowing additional truth values, they support the explicit modeling of uncertainty and disagreement. In order to do temporal reasoning over multiple-valued systems, we must extend a classical temporal logic to the multiple-valued case. For instance, the branchin...

The use of Look-Up Tables (LUTs) is extended from binary to multiple-valued logic (MVL) circuits. A multiple-valued LUT can be implemented using both current-mode and voltage-mode techniques, reducing the transistor count to half compared to that of a binary implementation. Two main applications for multiple-valued LUTs are multiple-valued FPGAs and intelligent memories. An FPGA uses a LUT as a...

Computing technologies are currently based on the binary logic/number system, which is dependent simple and off switching mechanism of prevailing transistors. With exponential increase data processing storage needs, there a strong push to move higher radix system that can eradicate or lessen many limitations system. Anticipated saturation Moore’s law necessity information density speed in futur...

This paper examines the concept of unateness for multiple-valued logic circuits, and its usefulness for concurrent checking through the use of unidirectional error-detecting codes. Three such codes are adapted for multiple-valued logic, and the set of operators which provide an internally unate circuit are described. For each code, modiications are also provided to incorporate testing for prima...