Combinational quantum circuits are essential for quantum computation; and quantum multiplexer circuit is one of the important combinational circuits. In this paper, we have presented the synthesis of quantum multiplexer circuit in detail. Instead of using functional blocks, we have used physically realizable quantum logic gates for synthesis of quantum multiplexers. In addition to this, our syn...

A multiplexer, sometimes referred to as a "mux", is a device that selects between a numbers of input signals. It is a combinational logic circuit. It is a unidirectional device and used in any application in which data must be switched from multiple sources to a destination. This paper represents the simulation of different 2:1 Multiplexer Structures and their comparative analysis on different ...

The multiplexer is a common standard sub-circuit used frequently in the datapath logic of complex designs, typically to provide a path for routing operands to operations and operation results to destination registers. During RTL synthesis, multiplexers are used for realizing ifthen-else and case statements in the RTL design description. In this paper, we describe a new heuristic algorithm for s...

In this paper, we propose a novel multiplexer-based full adder design, denoted as MUXFA, by using regular modules for arithmetic applications. The MUXFA full adder is composed of three identical modules, in which each module separately operates for XOR-XNOR function, sum function, and carry function. The structure of the multiplexer-based full adder can be easily constructed by merely a single ...

Multiple-valued logic (MVL) application in the design of digital devices opens additional opportunities. In this paper we have designed Quaternary latch & quaternary multiplexer. Multiplexer is designed with different threshold voltages. All the circuits were simulated with the Spice tool using TSMC 250 nm technology and have shown improvements in performance and power consumption and propagati...

A 16-channel 200 GHz arrayed-waveguide grating (AWG) (de)-multiplexer is demonstrated experimentally by utilizing Si3N4 buried optical waveguides, which have 50 nm-thick Si3N4 cores and a 15 μm-thick SiO2 cladding. The structure with an ultra-thin core layer helps to reduce the scattering due to the sidewall roughness and consequently shows very low loss of about 0.4~0.8 dB/m. When using this t...

| Decreasing capacitance of bus lines is one of the e ective ways to reduce whole power dissipation of LSIs. In this paper we compare microprocessors designed based on a bus architecture and a multiplexer architecture in terms of power dissipation and delay time. Through implementation of a test chip, the multiplexer architecture is e ective to reduce power dissipation by about 30%.

A major challenge for the design of multiservice networks with quality of service guarantees is an e cient implementation of a bounded delay service, that is, a service that guarantees maximum end-to-end delays for every packet from a single tra c stream. A crucial component of a bounded delay service is the packet multiplexing technique employed at network switches that must keep the variable ...