fe49co33ni18 nanowire arrays (175 nm in diameter and lengths ranging from 5 to 32μm) were fabricated into nanopores of hard-anodized aluminum oxide templates using pulsed ac electrodeposition technique. hysteresis loop measurements indicated that increasing the length decreases coercivity and squareness values (from 274 oe and 0.58 to200 oe and 0.105, respectively), indicating the increase in m...

InGaAs gate-all-around nanowire MOSFETs with channel length down to 50 nm have been experimentally demonstrated by a top-down approach. The nanowire size-dependent transport properties have been systematically investigated. It is found that reducing nanowire dimension leads to higher oncurrent, transconductance, and effective mobility due to stronger quantum confinement and the volume-inversion...

The formation of crystalline NixInAs and NixInAs/InAs/NixInAs heterostructure nanowires by the solid source reaction of InAs nanowires with Ni is reported for the first time. The fundamental kinetics of the Ni/InAs alloying reaction is explored, with the Ni diffusion reported as the rate determining step. The diffusivity of Ni is independent of the nanowire diameter, with an extracted diffusion...

This paper reports two new indium tin oxide (ITO)-based nanostructures, namely ITO@carbon core-shell nanowire and jagged ITO nanowire. The ITO@carbon core-shell nanowires (~50 nm in diameter, 1-5 μm in length,) were prepared by a chemical vapor deposition process from commercial ITO nanoparticles. A carbon overlayer (~5-10 in thickness) was observed around ITO nanowire core, which was in situ f...

S The electrostatics of nanowire transistors are studied by solving the Poisson equation self-consistently with the equilibrium carrier statistics of the nanowire. For a one-dimensional, intrinsic nanowire channel, charge transfer from the metal contacts is important. We examine how the charge transfer depends on the insulator and the metal/semiconductor Schottky barrier height. We also show th...

New insights into understanding and controlling the intriguing phenomena of spontaneous merging (kissing) and the self-assembly of monolithic Y- and T-junctions is demonstrated in the metal-organic chemical vapor deposition growth of GaAs nanowires. High-resolution transmission electron microscopy for determining polar facets was coupled to electrostatic-mechanical modeling and position-control...

The growth of single crystal InAs nanowire arrays on crystalline and amorphous substrates is described. This method is quite simple and fast, and uses only a bare InAs substrate as a source and a gold colloid on the growth substrate. High quality InAs nanowires can be produced by this technique, with the nanowire diameter controllable by the gold colloid size and the nanowire length controlled ...

This paper presents algorithms for estimating length, location, and orientation of nanowires in a fluidic workspace using images obtained by optical section microscopy. Images containing multiple nanowires are first segmented to locate general areas of interest which are then analyzed to determine discrete nanowire parameters. We use a set of image processing techniques to extract features of n...

Nanostructures such as nanoparticles and nanowires have been demonstrated as powerful tools to improve light absorption[1-4], to enable low temperature process[5], to demonstrate multi-exciton generation[6], and to decouple the absorption depth and carrier diffusion length[7, 8]. Here we demonstrated the first amorphous silicon coreshell nanowire solar cells, which can be fabricated through a l...

The current conduction process through a nanowire wrap-around-gate,B50nm channel diameter, silicon MOSFET has been investigated and compared with a B2mm wide slab, B200nm thick silicon (SOI) top-only-gate planarMOSFETwith otherwise similar doping profiles, gate length and gate oxide thickness. The experimental characteristics of the nanowire and planar MOSFETs were compared with theoretical sim...