A wavelet transform method for fault detection of power supply circuit is presented. The wavelet transform is applied to the healthy and faulty circuit under test (CUT) to obtain transform coefficients. Standard deviation (SD) of transform coefficients are extracted to create fault dictionary. The simulation result shows effectiveness of transform based method for fault detection of power suppl...

Abstract The paper presents a split-level sinusoidal power supply clock generator circuit for Two-Phase Adiabatic Static CMOS Logic circuit (2PASCL). The driving of adiabatic logic requires adiabatic controlled sources of voltage. We study the clock voltage generator circuit using SPICE simulation and investigate the most suitable scheme and highest energy efficiency for the energy recovery pow...

There are a lot of ways to achieve large current pulse power supply, and the more common way is to adopt the inverter switching circuit to achieve pulse power supply. The core of the NC power supply design of large current and wide frequency pulse in SEAM is using two-stage modulation. Combined with inverter technology, DC chopper technology and NC technology, it not only can achieve the adjust...

This work introduces a new and simple method for adjusting the gain of current mirror. The major advantage of the proposed architecture is that, unlike the conventional variable gain current mirror, it does not need the change of the biasing current to adjust current gain. Therefore, the power dissipation remains constant in all of the gain settings. In addition, the proposed variable gain curr...

This paper presents the design of a low-power voltage reference, bias current and the supply voltage for a 9-bit fully differential ADC. The references, power supply circuits and the ADC are integrated in one circuit, i.e. chip. The proposed chip is implemented in the UMC 0.18 μm CMOS process and occupies 800×700 μm. The circuit supply voltage V DD is obtained from the external RF signal. When ...

Although the trend toward finer geometries and larger chips has produced faster systems, it has also created larger voltage drops and higher current densities in chip power supply networks. Excessive voltage drops in the power supply lines cause incorrect circuit operation, and high current densities lead to circuit failure via electromigration. Analyzing this power supply noise by hand for lar...

The very fast growing market of portable equipment is increasing interest in low power integrates circuit. So, designing low power integrated circuits requires reduction of supply voltages and interconnection parasitic to minimum but reduction in supply voltage implies series of problems in circuit design. To overcome these issues, an Ultra low power low voltage two stage class AB CMOS fully di...

The NULL Cycle Reduction (NCR) technique can be used to improve the performance of a NULL Convention Logic (NCL) circuit at the expense of power and area. However, by decreasing the supply voltage, the power of the NCR circuit can be reduced. Since NCR has increased performance, it should be possible to reduce supply voltage to decrease overall power while maintaining the original performance o...

This paper proposes a low voltage CMOS Nano power current reference circuit and presents its performance with circuit simulation in 180nm UMC CMOS technology. The proposed circuit consists of start-up, Bias-voltage, currentsource sub-circuits with most of the MOSFETs operating in sub-threshold region. Simulation results shows that the circuit generates a stable reference current of 4-nA in supp...

Discussed is a circuit which measures and analyses power supply transients as defined in the test technique, Transient Signal Analysis (TSA). This circuit can replace the benchtop instrumentation and offline signal processing software used in previous work. The circuit accepts voltage transients as analog inputs from the Device-Under-Test (DUT), performs integration and outputs an analog value ...