Common binary arithmetic operations such as addition/subtraction and multiplication suffer from O(n) carry propagation delay where n is the number of digits. Carry lookahead helps to improve the propagation delay to O(log n), but is bounded to a small number of digits due to the complexity of the circuit. A carry-free arithmetic operation can be achieved using a higher radix number system such ...

This paper examines the concept of unateness for multiple-valued logic circuits, and its usefulness for concurrent checking through the use of unidirectional error-detecting codes. Three such codes are adapted for multiple-valued logic, and the set of operators which provide an internally unate circuit are described. For each code, modiications are also provided to incorporate testing for prima...

There exist extensive ongoing research efforts on emerging technologies that have the potential to become an alternative to today’s CMOS technologies. A common feature among the investigated technologies is that of multivalue devices and the possibility of implementing quaternary logic and memory. However, multi-value devices tend to be more sensitive to interferences and, thus, have reduced er...

– This paper is about the design, simulation and study of a CMOS quaternary logic generator having a single stage CMOS body driven design. The interest of design is that the circuit consists of only one CMOS circuit, reducing the chip area and also only two supply rails is required to drive the complete circuitry. The multi-valued logic generator, designed here is also demonstrated with and wit...

Let C be a class of relational structures. We denote by fC(n) the number of structures in C over the labeled set {0, . . . , n − 1}. For any C definable in monadic second order logic with unary and binary relation symbols only, E. Specker and C. Blatter showed that for every m ∈ N, the function fC satisfies a linear recurrence relation modulo m, and hence it is ultimately periodic modulo m. The...