A successive approximation register (SAR) analog-todigital converter (ADC) with an integrating resolution booster (IRB) is proposed and experimentally verified to provide the capability of dual-mode operation, that is, low-power and high-resolution modes. This dual-mode architecture corresponds to a kind of hybrid ADC architecture, combining a low-power SAR ADC and a high-resolution integrating...

This paper describes a comparator that uses a gain stage as a preamplifier in the preamplification mode and as a latch in the latch mode. This method effectively reduces the power consumption of the comparator. Using a 1.2um CMOS process and applying offset cancellation to all of the circuit, an offset of less than 100uV at comparison rates up to 6MHz, with only a 130uW power dissipation and 3V...

Due to their low number of biased components, algorithmic A/D converters are often used in low power implementations. This paper describes an algorithm developed at the Institute of Microtechnology (IMT) which allows extending performances of cyclic RSD converters, without greatly impairing its benefits (reduced silicon area, low consumption). To achieve a Total Harmonic Distortion + Noise (THD...

Search key resolution power is analyzed in the context of a request, i.e., among the set of search keys for the request. Methods of characterizing the resolution power of keys automatically are studied and the effects search keys of varying resolution power have on retrieval effectiveness are analyzed. It is shown that it often is possible to identify the best key of a query while the discrimin...

This preliminary report addresses the expressive power of unit resolution regarding input data encoded with partial truth assignments of propositional variables. A characterization of the functions that are computable in this way, which we propose to call propagatable functions, is given. By establishing that propagatable functions can also be computed using monotone circuits, we show that ther...