The purpose of this research was to suggest a junction-less strategy for vertical Tunnel Field Effect Transistor, which would increase the device's efficiency. In study, we examine similarities and differences between negative capacitor TFET vertically generated with source pocket heterostructure-based nanowire gate. And how channel transit impacts output qualities sub-100 nanometer sized devic...

The aim of the proposed paper is an analytical model and realization characteristics for tunnel field-effect transistor (TFET) based on charge plasma (CP). One most applications TFET device which operates CP technique biosensor. CP-TFET to be used as effective detect uncharged molecules bio-sample solution. Charge one some techniques that recently invited induce carriers inside devices. In this...

The continuous scaling down of feature size in Silicon technology has resulted in several technological and fundamental hindrances. The researchers started to look for new nanoscale devices those can replace CMOS transistors in digital circuits. The nanowire transistor, FinFET, Carbon Nanotube field effect transistor (CNFET), tunnel field effect transistor (TFET), and single electron transistor...

Abstract: In this paper, a novel tunnel field effect transistor (TFET) is introduced, thatdue to its superior gate controllability, can be considered as a promising candidate forthe conventional TFET. The proposed electrically doped heterojunction TFET(EDHJTFET) has a 3D core-shell nanotube structure with external and internal gatessurrounding the channel that employs el...

In this paper, we proposed a 2-D analytical model for electrical characteristics such as surface potential, electric field and drain current of Silicon-on-Insulator Tunnel Field Effect Transistor (SOI TFETs) with a SiO2/High-k stacked gate-oxide structure. By using superposition principle with suitable boundary conditions, the Poisson’s equation has been solved to model the channel r...