the purpose of food packaging is to preserve the quality and safety of the food it contains from the time of manufacture to the time it is used by the consumer. recently, the demand for safe and high quality foods, as well as changes in consumer preferences have led to the development of innovative and novel approaches in food packaging technology. one such development is the active food packag...

Low-Density Parity-Check (LDPC) code is one kind of prominent error correcting codes (ECC) being considered in next generation industry standards. The decoder implementation complexity has been the bottleneck of its application. This paper presents a new kind of high-throughput and memory efficient LDPC decoder architecture. In general, more than fifty percent of memory can be saved over conven...

A high speed decoding algorithm using a modified step-by-step method for t-error-correcting Reed-Solomon codes is introduced. Based on this algorithm, a sequential decoder and a vector decoder are then proposed. These two decoders can be constructed by four basic modules: the syndrome calculation module, the comparison module, the decision module, and the shift-control module. These decoders ca...

A frame synchronization scheme based on decoder soft outputs of low-density parity-check codes over high frequency channels is considered. In a coded orthogonal frequency division multiplexing based system, low-density parity-check code decoder soft outputs are exploited in order to perform frame synchronization. The decoder soft outputs are observed for several candidate frame start positions ...

Applying a joint code and decoder design methodology, we develop a high-speed (3, k)-regular LDPC code partly parallel decoder architecture, based on which a 9216-bit, rate1/2 (3, 6)-regular LDPC code decoder is implemented on Xilinx FPGA device. When performing maximum 18 iterations for each code block decoding, this partly parallel decoder supports a maximum symbol throughput of 54 Mbps and a...

Hypothetical Reference Decoder is a hypothetical decoder model that specifies constraints on the variability of conforming network abstraction layer unit streams or conforming byte streams that an encoding process may produce. High Efficiency Video Coding (HEVC) builds upon and improves the design of the generalized hypothetical reference decoder of H.264/ AVC. This paper describes some of the ...

In 2004, a new standardization activity called reconfigurable video coding (RVC) was started by MPEG with the purpose of offering a framework which provides reconfiguration capabilities for standard video coding technology. The essential idea of RVC framework is a dynamic dataflow mechanism of constructing new video codecs by a collection of video coding tools from video tool libraries. With th...

This paper presents a low-complexity, high-speed RS(255,239) decoder architecture using Modified Euclidean (ME) algorithm for the high-speed fiber optic communication systems. The RS decoder features a low-complexity key equation solver using a novel pipelined recursive ME algorithm block. Pipelining allows inputs to be received at very high fiber optic rates and outputs to be delivered at corr...