Accurate age modeling, and fast, yet robust reliability sign-off emerged as mandatory constraints in IC design for advanced process technology nodes. This paper proposes a device-level aging assessment and prediction model using the signal slope as aging quantifier, that accounts not only for the intrinsic self-degradation but also for the influence of the surrounding circuit topology. Experime...

• Small physical size: The space constraints of many detectors, most notably pixel vertex detectors, absolutely require custom microelectronics. Even when commercial electronics can be used, small ASICs can often be positioned closer to the sensor than would otherwise be possible. This reduces input capacitance and improves noise performance. In many cases the size of the cable plant is also re...

Flexible Application Specific Instruction set Processors (ASIP) are starting to replace monolithic ASICs in a vide variety of fields. However the design of an ASIP is today a substantial design effort. This paper discusses NoGAP (Novel Generator for ASIP) a tool for ASIP designs utilizing hardware multiplexed data paths. One of the main advantages of NoGAP compared to other ADL tools is that it...

This paper describes a project course that focuses on all the different stages in an ASIC design flow. The project starts at algorithm level, followed by architecture selection, netlist generation, down to physical layout, fabrication, and finally verification. The scope of the project, implementing a complete MP3 decoder in VHDL and sending it for fabrication, motivates the students to work ha...

This paper uses a CAD methodology proposed by the authors to design a low-power 2ndorder Σ∆M. This modulator has been fabricated in a 0.7μm CMOS technology to be used as the front-end of an energy metering mixed-signal ASIC and features 16.4bit at a digital output rate of 9.6kHz with a power consumption of 1.71mW. It yields a value of the figure which is the smallest reported to now, thus demon...

Modern AC drives require a fast digital realization of many mathematical operations concerning control and estimator’s algorithms, which are time consuming. Therefore developing of custom built digital interfaces as well as digital data processing blocks and sometimes even integration of ADC converters into single integrated circuit is necessary. Due to the fact that developing an ASIC chip is ...

The high cost of IC design has made chip protection one of the first priorities of the semiconductor industry. Although there is a common impression that combinational circuits must be designed without any cycles, circuits with cycles can be combinational as well. Such cyclic circuits can be used to reliably lock ICs. Moreover, since memristor is compatible with CMOS structure, it is possible t...

There is currently a huge gap between the two main technologies used to implement custom digital integrated circuit (IC) designs. At one end of the spectrum are field programmable gate arrays (FPGAs). These devices have relatively low design costs and short design times, but they also have high per-unit costs and are limited in terms of design size, complexity, and performance. At the other end...

ASIC products can provide system solutions that would not otherwise be possible with commercial offthe-shelf semiconductor devices. Reduction in system cost, volume and weight as well as increase in system performances are only few of the most obvious advantages. Sometimes, though, deciding to apply an ASIC design solution to an analogue or mixed-signal circuit can imply difficult decisions and...