Entity Set Expansion (ESE) is a valuable task that aims to find entities of the target semantic class described by given seed entities. Various Natural Language Processing (NLP) and Information Retrieval (IR) downstream applications have benefited from ESE due its ability discover knowledge. Although existing corpus-based methods achieved great progress, they still rely on corpora with high-qua...

As the complexity of VLSI circuits is increasing at the rate predicted by Moore's law and the switching frequencies are approaching a gigahertz, testing cost is becoming an important factor in the overall IC manufacturing cost. Testing cost is incurred by test pattern generation and test application processes. In this dissertation, we address both of these factors contributing to the testing co...

Advancements in semiconductor technology are making gate-level test generation more challenging. This is because a large amount of detailed structural information must be processed in the search process of automatic test pattern generation (ATPG). In addition, ATPG needs to deal with new defects caused by process variation when IC is shrinking. To reduce the computation effort of ATPG, test gen...

Existing approaches for modular manufacturing testing of core-based systems-on-a-chip (SOCs) do not provide any explicit mechanism for high quality two-pattern tests required for performance validation through delay fault testing. This paper proposes a new approach for broadside delay fault testing of core-based SOCs, by adapting the existing solutions for automatic test pattern generation and ...

This paper gives a concise introduction to Multi-Objective Genetic Algorithms and FPGAs and it reveals that how Automatic Test Pattern Generation method can be formulated in terms of CNF form which in turn used to generate test patterns using Multi-Objective Genetic Algorithm. By applying a Multi-Objective Genetic Algorithm on this CNF form, it has been observed from the experiments that as the...

In this paper we present a novel approach for patternconstrained test case generation. The generation of test cases with known characteristics is usually a non-trivial task. In contrast, the proposed method allows for a transparent and intuitive modeling of the relations contained in the test data. For the presented approach, we utilize a general-purpose data generator: It relies on easy to und...

This paper extends state-of-the-art ATPG systems by including constraints, called restrictors, on the allowable values of the bits of a test vector. Such restrictors often occur in ’realworld’ circuits where certain bit positions of a test vector have to take on a particular value (e.g. in case of a reset line) or are prohibited from taking on a particular value (e.g. in order to prevent an ill...

We recently proposed an unconventional digital circuit modeling technique and formulated test generation as an energy minimisation problem [7]. Although energy minimisation is as hard as test generation, the new approach has two advantages. Since the circuit function is mathematically expressed, operations research techniques like linear and non-linear programming can be applied to test generat...