We investigate signal-to-noise ratio (SNR) characteristics of an 850-nm optoelectronic integrated circuit (OEIC) receiver fabricated with standard 0.25-µm SiGe bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. The OEIC receiver is composed of a Si avalanche photodetector (APD) and BiCMOS analog circuits including a transimpedance amplifier with DC-balanced buffer, a tunable e...

In Network-on-Chip (NoC), Time-Division-Mutiplexing(TDM) Virtual Circuit (VC) is well recognized as being capable to provide guaranteed services in both latency and bandwidth. We propose a method of modeling TDM based VC by using Network Calculus. We derive a tight upper bound of end-to-end delay and buffer requirement for indivdual VC. The performance analysis using Latency-Rate server is also...

This paper presents a simple class AB buffer which is suitable for low-voltage (1.5 V) applications. The proposed buffer uses an adaptive load to reduce the sensitivity of the quiescent current to the process variation. The main feature of this scheme is its simplicity. The circuit was fabricated in a 2.0 m digital CMOS process. Experimental results demonstrate that the buffer can operate with ...

An ultra low-power high-speed rail-to-rail buffer amplifier with improved current summing circuit is proposed for LCD source drivers. By placing two complementary differential pairs in parallel, it is possible to obtain a rail-to-rail input stage. Then, a current summing circuit with two embedded comparators is proposed. With the proposed current summing circuit, the output stages will be turne...

A low power, high speed, but with a large input dynamic range and output swing class-B output buffer circuit which is suitable for the flat-panel display application is proposed. The buffer draws little current during static but has a large driving capability during transients. It has been demonstrated with the TSMC 0.6μm CMOS technology.

Alcohol soluble titanium chelate TIPD (titanium (diisopropoxide) bis(2,4-pentanedionate)) was used as an electron transporting layer to form an ohmic contact with the negative electrode, aiming to enhance the charge extraction and suppress the charge recombination for high performance CH3NH3PbI3/PCBM-based PHJ perovskite solar cells. The TIPD layer shows excellent suitability to CH3NH3PbI3 pero...

Design of a 3.3V comaptible 2.5V TTL-toCMOS bidirectional I/O buffer is proposed. Gate oxide protectiom was implemented without active voltage degradation, which reduces static and dynamic current levels and improves noise immunity for the low voltage circuit of this kind. Fast removal of stored charge further improve gate oxide protection and circuit recovery from overvoltage condition. Circui...

A CMOS realization of the current-feedback differential difference amplifier (CFDDA) is proposed. The CFDDA circuit is realized using a wide input range dependent load transconductor (DTA) with three independent input voltages and a rail to rail classAB voltage buffer. The CFDDA circuit is used to realize a MOS-C oscillator suitable for VLSI. PSpice simulation results for the CFDDA circuit and ...

A 10-Gb/s current mode logic (CML) input/output (I/O) circuit for backplane interconnect is fabricated in 0.18m 1P6M CMOS process. Comparing with conventional I/O circuit, this work consists of input equalizer, limiting amplifier with active-load inductive peaking, duty cycle correction and CML output buffer. To enhance circuit bandwidth for 10-GB/s operation, several techniques include active ...

The specifications and performance of RAMP, a Reliable Adaptive Multicast Protocol, are presented. Initially described in IETF RFC 1458 [1], RAMP has been enhanced for use over an all-optical, circuit-switched, gigabit network under our ARPA-sponsored Testbed for Optical NEtworking (TBONE) project. RAMP uses immediate, receiver-initiated, NAK-based error notification combined with originator-ba...