Adiabatic quantum-flux-parametron (AQFP) logic is an energy-efficient superconductor family. The latency of AQFP circuits relatively long compared to that other families and thus such require low-latency clocking schemes. In a previous study, we proposed scheme called delay-line clocking, in which the for each operation determined by propagation delay excitation current, demonstrated simple buf...

ElectroMagnetic Interferences (EMI) are emerging problems in today’s high speed circuits. There are several examples that these interferences affected the circuits and systems. This work tries to reduce the abovementioned problems in synchronous systems by modifying the clock signal such that it produces less interferers. In this thesis first EMI and its sources and related definitions are stud...

In this paper, we investigate the ever-increasing power issue that is poised to jeopardize performance and robustness of future low-power microprocessor design. We have observed a tremendous amount research in clock network design bolster energy-efficient computing, without, however, any substantial improvement overall performance. work, used emerging ferroelectric negative capacitance field-ef...

Energy-awareness is an important design criterion for many mobile real-time applications such as phones, handhelds or cars. Normally, high-computing power excludes low electrical power consumption. However, with the two methods of space-sharing and adaptive clocking that are proposed in this paper, both can be reconciled. Space-sharing is an alternative design methodology for embedded systems t...

We present a novel hybrid CMOS-MQCA architecture using multi-layer Spintronic devices as computing elements. A feasibility study is presented with 22nm CMOS where new approaches for spin transfer torque induced clocking and readout scheme for variability-tolerance are introduced. A firstof-its-kind Spintronic device model enables circuit simulation using existing CAD infrastructure. Approximate...