Complementary Metal Oxide Semiconductor (CMOS) image sensors have widely been used due to the advantages in terms of low power consumption, on-chip signal processing capability, and a comparatively low cost. The market research institutes predicted that the demand for CMOS image sensors will dramatically increase over the next few years. Although the demand continues to increase, the market is ...

This paper compares the ratioed logic circuits and conventional CMOS design. This comparison performed on efficient CMOS circuit realizations and the ratioed logic circuits and it is resulted in to superiority of ratioed circuit over the conventional CMOS in some cases with respect to area, input capacitance. In this paper, 4-input NAND gate is designed using the conventional CMOS design and ps...

A survey of industry trends from the last two decades of scaling for CMOS logic is examined in an attempt to extrapolate practical directions for CMOS technology as lithography progresses toward the point at which CMOS is limited by the size of the silicon atom itself. Some possible directions for various specialized applications in CMOS logic are explored, and it is further conjectured that do...

This paper presents a new self-resetting CMOS design for an Add-Compare-Select (ACS) unit, which is a key building block in a Viterbi decoder. Static CMOS and two-phase domino CMOS designs have also been implemented for comparison purposes. The simulation results show that, with the SRCMOS technique, the ACS units operate at a data rate of 568 Mbps in a 0.25 micron CMOS technology, as compared ...

this paper presents a design of an uwb downconversion integrated cmos resistive ring mixer with linear voltage regulator (lvr), to supply required biasing voltages for the mixer section. the designed mixer circuit has been optimized for using in heart rate extraction system with microwave doppler radar at 2.4ghz frequency. this mixer needs 2 dc bias voltages equal to 0.5 and 1 volts for its bes...

Graphene/silicon CMOS hybrid integrated circuits (ICs) should provide powerful functions which combines the ultra-high carrier mobility of graphene and the sophisticated functions of silicon CMOS ICs. But it is difficult to integrate these two kinds of heterogeneous devices on a single chip. In this work a low temperature process is developed for integrating graphene devices onto silicon CMOS I...