This paper presents a four-stage CMOS distributed amplifier (DA) design implemented in standard 0.18 μm CMOS technology. The proposed design eliminates the need for transmission line capacitors and, consequently, uses significantly smaller spiral inductors compared with the previous designs. Using the minimum size inductor, the bandwidth of the amplifiers is extended, and the quality factors of...

Presented is a 0.9 V rail-to-rail constant gm CMOS amplifier input stage consisting of complementary differential pairs and a gm control circuit. The gm control circuit eliminates the gm dead zone, which occurs in the conventional rail-to-rail amplifier with ultra-low supply voltages. The proposed amplifier input stage has a constant gm that varies by +2.3% for rail-to-rail input common-mode le...

A low-noise CMOS amplifier operating at a 1-V supply voltage is developed using the two noise reduction techniques of autozeroing and chopper stabilization. The proposed amplifier utilizes a feedback with virtual grounded input-switches and a multiple-output switched op-amp. The low-noise amplifier fabricated by a 0.18-μm CMOS technology was measured at a 1-V power supply, and achieved low nois...

In this review article, a stage-convertible RF power amplifier designed with a 0.18-m RF CMOS process is described. A method to implement a low-power matching network is an essential technology for the stage-convertible power amplifier. Various low-power matching networks with distributed active transformers as an output power combiner are compared in terms of the amounts of undesired coupling...

We present a fully integrated 12.5-Gb/s optical receiver fabricated with standard 0.13-µm complementary metal-oxide-semiconductor (CMOS) technology for 850-nm optical interconnect applications. Our integrated optical receiver includes a newly proposed CMOS-compatible spatially-modulated avalanche photodetector, which provides larger photodetection bandwidth than previously reported CMOS-compati...

In this paper we present a three-stage fully differential operational amplifier in 120nm digital CMOS. To reach high gain gain-boosted cascodes in the first stage are used. The gain-boost amplifiers are realized as two-stage amplifiers with self cascodes. A DC gain of 108dB and an unity-gain frequency of 1.06GHz are achieved at 1.2V supply. The operational amplifier is appropriate for supply vo...

This paper presents the design and development of a CMOS Instrumentation Amplifier for biomedical application. This design manages to achieve 101dB gain, PSRR > 102dB and 91dB CMRR. The final circuit consumes total of 0.318μWatts power at 1.8V supply voltage and possesses die size of 9.6nm area. It also has a full CMOS implementation of offset cancellation circuitry, among the first of its kind...

AbstractChopping is a proficient way to reduce the low frequency offset and 1/f noise in amplifiers. In this paper, a low power low noise CMOS chopper amplifier is presented. It is composed of a two stage amplifier. The first stage’s high output impedance and the equivalent Miller capacitance of the second stage constitute together a low pass filter, which reduces the power consumption. The cir...