Analysis of the electrostatic characteristics and the gate capacitance of typical nanostructured carbon nanotube field effect transistors (CNTFETs) were performed numerically. A previously developed parallelized electrostatic Poisson’s equation solver (PPES) is employed, coupled with a parallel adaptive mesh refinement (PAMR) to improve the numerical accuracy near the region where variation of ...

This paper presents two new efficient ternary Full Adder cells for nanoelectronics. These CNTFETbased ternary Full Adders are designed based on the unique characteristics of the CNTFET device, such as the capability of setting the desired threshold voltages by adopting proper diameters for the nanotubes as well as the same carrier mobilities for the N-type and P-type devices. These characterist...

Hybrid Nano (e.g. Nanotube and Nanowire) /CMOS circuits combine both the advantages of Nano-devices and CMOS technologies; they have thus become the most promising candidates to relax the intrinsic drawbacks of CMOS circuits beyond Moore’s law. A functional simulation model for an hybrid Nano/CMOS design is presented in this paper. It is based on Optically Gated Carbon NanoTube Field Effect Tra...

Difference differential amplifiers (DDA), which were built on FinFET and carbon nanotube FET (CNTFET), are frequently used for signal processing owing to their advantages of low-power dissipation reduced device dimension. In this work, high-performance DDA was established using CNTFET model parameters as well 7 nm 14 technology. The circuit in scenario identically the same one previously. With ...

This paper presents effective design of ternary ALU using Carbon Nano tube Field effect transistor (CNTFET) atv32 nm technology. Ternary logic is possible substitutes to traditional binary logic, because more number operation can performed using ternary logic as compare to binary logic due to this possible to achieve simplicity and energy efficient inrecent digital logic design due to reduced c...

signed using 3 identical CNTFET, while resistors represent parasitic elements. The further fourth NOT gate has been used only to load the third stage. We have simulated the circuit driven by a 14ps clock, also in this case the CNT quantum inductance is negligible since the magnitude of the inductive reactance is much smaller than the resistances RD, RS. In the above simulations quantum capacita...

Today, multipliers are included as substantial keys of many systems with high efficiency such as FIR filters, microprocessors and processors of digital signals. The efficiency of the systems are mainly evaluated by their multipliers capability since multipliers are generally the slowest components of a system while occupying the most space. Multiple Valued Logic reduces the number of the requir...