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The architecture and required building blocks of CMOS fuzzy chips capable of performing as adaptive fuzzy controllers are described in this paper. The building blocks are designed with mixed-signal current-mode cells that contain low-resolution A/D and D/A converters based on current mirrors. These cells provide the chip with analog or digital programmability and long-term local storage. They a...

CMOS active pixel sensors (APS) allow the flexibility of placing signal processing circuitry on the imaging focal plane. The multiresolution CMOS APS can perform block averaging on-chip to eliminate the off-chip software intensive image processing. This 128 x 128 APS array can be read out at any user-defined resolution by configuring a set of digital shift registers. The full resolution frame r...

The Architecture for a multi-technology testbench on a chip is presented for functional testing of mixed signal devices. The technologies tested by this System-on-a-Chip (SoC) include Op Amps, biosensors, and smart signal processing of Analog/Digital Multiplexers. This paper focuses on describing the architecture of the testbench on a chip as well as the results obtained from testing integral c...

A new architecture is presented for a single-chip tuner for digital terrestrial television, based on existing double conversion and direct conversion topologies. The new design forms part of a mixed-signal Digital Video Broadcasting–Terrestrial (DVB-T) receiver system, employing digital signal processing at baseband to ensure minimal performance requirements for the analog circuitry. To evaluat...

the article introduces cyclic dilation groups and finite affine groups for prime integers, and  as an application of this theory it presents a unified group theoretical approach for the  cyclic wavelet transform (cwt) of prime dimensional periodic signals.

With the development of digital processing technology, digital receivers have wide applications in radar systems as well as wireless communications systems. In the digital receivers with intermediate frequency (IF) sampling technique, the analog-to-digital converter (ADC) directly converts IF signal into digital format prior to detection. And the digital signal processor (DSP) using Hilbert tra...

This paper reviews a set of techniques for compiling dataflow-based, graphical programs for embedded signal processing applications into efficient implementations on programmable digital signal processors. This is a critical problem because programmable digital signal processors have very limited amounts of on-chip memory, and the speed and power penalties for using off-chip memory are often pr...