A 3-bit ADC for X-band applications that can work at a sampling rate of 11 GS/s is presented in this paper. Current comparators are used to achieve the high sampling rate of 11 GHz at X-band. A 3-bit current-steering DAC is also designed for testing the high-speed ADC. The ADC-DAC RFIC is implemented in a 0.12 μm SiGe technology and occupies a core area of 1.0 x 0.8 mm. The ADC can operate with...

INTRODUCTION We describe initial validation of a new system for digital to analog conversion (DAC) and reconstruction of 12-lead ECGs. The system utilizes an open and optimized software format with a commensurately optimized DAC hardware configuration to accurately reproduce, from digital files, the original analog electrocardiographic signals of previously instrumented patients. By doing so, t...

VLSI technology is to optimize the any type of digital architecture used to enhance the various applications. One of the mainobjectives is to reduce the glitch energy in various systems. The survey is to optimize glitch energy. Different techniques are used to improve the performance by reducing the glitch. Some of the parameters areSpurious Free Dynamic Range (SFDR), Along with Integral Non Li...

in this paper, a new high dynamic range digitally-controlled oscillator (dco) for all-dpll systems is proposed. the proposed dco is based on using a δς modulator as a digital-to-analog converter. using δς dac can provide a very high resolution (18-bit) control on the dco. the δς dac output is a 2-level pulse signal that needs to be filtered for cancelling the out of band shaped noise. the used ...

Recently, various multibit noise-shaping digital-toanalog converters (DAC’s) have been proposed that use digital signal processing techniques to cause the DAC noise arising from analog component mismatches to be spectrally shaped. Such DAC’s have the potential to significantly increase the present precision limits of data converters by eliminating the need for one-bit quantization in delta-sigm...

1 ADC TYPES Analog-to-Digital Converters (ADCs) transform an analog voltage to a binary number (a series of 1’s and 0’s), and then eventually to a digital number (base 10) for reading on a meter, monitor, or chart. The number of binary digits (bits) that represents the digital number determines the ADC resolution. However, the digital number is only an approximation of the true value of the ana...

The research program aims at improving the performance of appliances based on Analogto-Digital and Digital-to-Analog conversion (ranging from measuring instruments to on-chip ADC and DAC). This will be done by developing methods for the accurate measurement and correction of conversion errors (including, when applicable, errors caused by transducers and signal-conditioning blocks). Another aim ...

This letter reports an extremely small differential non-linearity (DNL) in a cyclic analog-to-digital converter (ADC) using depletion-mode MOS (DMOS) capacitors for CMOS image sensors (CISs). Compared with conventional 1.5b digital-to-analog converter (DAC) configuration using 3 reference signals, the cyclic ADC with split sampling DMOS capacitors in the 1.5b DAC has the maximum DNL of +0.125/-...

Battery-powered portable audio devices require low-voltage, low-power, and medium-accuracy digital-to-analog converters (DACs). The proposed structure is inherently suitable for lowvoltage and low-power applications. Fig. 1 shows the block diagram of the complete DAC system. The input of the DAC is a 16-bit serial digital signal DIN; the analog output AOUT drives the headphone load (16Ω paralle...

Analog Delay Line, " has been reviewed in final form. Permission, as indicated by the signatures and dates given below, is now granted to submit final copies to the College of Graduate Studies for approval. ABSTRACT High-speed synchronous interface circuits require that the controlling clock signals be accurately aligned. A dynamic de-skew circuit can be used to ensure good clock alignment acro...