Photovoltaic (PV) system output electricity is related to PV cells’ conditions, with the PV faults decreasing the efficiency of the PV system and even causing a possible source of fire. In industrial production, PV fault detection is typically laborious manual work. In this paper, we present a method that can automatically detect PV faults. Based on the observation that different faults will ha...

To fill the gap between increasing demand for reconfigurability and performance efficiency, coarse grain reconfigurable architectures are seen to be an emerging platform. The advantage lies in quick dynamic reconfiguration and power efficiency. Despite having these advantages they have failed to show their mark. This paper describes the QUKU architecture, which uses a coarsegrained dynamically ...

A risk of covert insertion of circuitry into reconfigurable computing (RC) systems exists. This paper reviews risks of hardware attack on field programmable gate array (FPGA)-based RC systems and proposes a method for secure system credentials generation (unique, random and partially anonymous) and trusted self-reconfiguration, using a secure reconfiguration controller (SeReCon) and partial rec...

Massively parallel computers consisting of thousands of processing elements are expected to be high-performance computers in the next decade. One of the major issues in designing massively parallel computers is the reconfiguration strategy in order to provide an efficient fault tolerance mechanism to avoid defective processors in such large scale systems. This paper develops a self-reconfigurab...

In this paper, energy-efficient architecture for Variable Block Size Motion Estimation (VBSME) is proposed to fully utilize dynamic partial reconfiguration capability of programmable hardware fabric in the heterogeneous computing environment. Dynamic Partial Reconfiguration is a unique feature of FPGAs that makes best use of hardware resources and power by allowing adaptive algorithm to be impl...

The output power of a PV (photovoltaic) array decreases due to the partial shading condition (PSC). If one or more modules receives less irradiance compared other in then it is called PSC. To enhance under PSC, Sudoku, and Optimal Sudoku Reconfiguration techniques are available literature for perfect squared arrays, such as 4 × 4, 9 9, 16 16. Odd–Even Odd–Even–Prime reconfigurations rectangular...

Achieving fault tolerance through incorporation of redundancy and reconfiguration is quite common. In this paper we study the fault tolerance of linear arrays of N processors with k bypass links whose maximum length is g. We consider both arrays with bidirectional links and unidirectional links. We first consider the problem of testing whether a set of n faulty processors is catastrophic, i.e.,...

Dynamic Partial Reconfiguration(DPR) optimizes the resource utilization in the Field Programmable Gate Array(FPGA) over time and space nowadays. But the lack of standard tools and interface makes the extensive application of DPR rather difficult . With the open source Linux widely used in the Xilinx Zynq, users’ demand for the reconfiguration becomes urgent. Linux-based dynamic partial reconfig...