The Internet is the largest global recognized communication system, which evolved in dimensions of technology, capacity, availability and subscriber, transported data, etc. since its beginnings in the 1960’s continuously. As the world moves towards a data-only network environment with Long-TermEvolution (LTE) and its advanced version (LTE-A), it is crucial to ensure Quality-of-Service (QoS) eve...

Efficient management of scarce access network resources for growing volume of Machine-to-Machine (M2M) communications play an important role in a Long Term Evolution (LTE) network. Understanding the communication requirements of machine-to-machine (M2M) services, and linking them to technical, as well as economic aspects, is a crucial step towards “smarter” charging of such services. We discuss...

The Service-oriented Router (SoR), a highly functional router based on a novel router architecture, enables unprecedented web services traditional routers were unable to provide. The SoR performs Deep Packet Inspection (DPI) to analyze Layer 7 information, which is becoming increasingly difficult due to the substantial increase in Internet traffic. Meanwhile, multi-core processors and general-p...

Abstract Network latency is a critical factor for the perceived quality of experience many applications. With an increasing focus on interactive and real-time applications, which require reliable low latency, ability to continuously efficiently monitor becoming more important than ever. Always-on passive monitoring can provide continuous metrics without injecting any traffic into network. Howev...

Network function virtualization (NFV) is a novel concept that enables an architectural transition from dedicated hardware to orchestrated resource and management. As integral part of the core network, NFV offers fine-grained network capability cellular operators by scaling out or in resources on-demand manner meet performance requirements. However, designing autoscaling algorithm with low opera...

Generic purpose multi-core PC architectures are facing performance challenges of high rate packet reception on gigabit per second and higher speed network interfaces. In order to assign a CPU core to a networking softIRQ, the single input queue design of the low-level packet processing subsystem relies on the kernel's Symmetric Multiprocessing (SMP) scheduler, which does not perform load balanc...