This paper introduces the Simulation Architecture Description Language (SADL) developed at the National Aeronautics and Space Administration’s Marshall Space Flight Center to support the real-time simulation of advanced avionics systems. SADL is a graphical, domain-specific Architecture Description Language (ADL) that facilitates the high-level specification of both the software and hardware as...

Residue Number System is a numerical system which arithmetic operations are performed parallelly. One of the main factors that affects the system’s performance is the complexity of reverse converter. It should be noted that the complexity of this part should not affect the earned speed of parallelly performed arithmetic unit. Therefore in this paper a high speed converter for moduli set {2n-1, ...

Residue Number System is a numerical system which arithmetic operations are performed parallelly. One of the main factors that affects the system’s performance is the complexity of reverse converter. It should be noted that the complexity of this part should not affect the earned speed of parallelly performed arithmetic unit. Therefore in this paper a high speed converter for moduli set {2n-1, ...

In this work, we expose our approach to design and optimize mixed analogue and digital systems at a high level description using the hardware description language VHDL-AMS. Many statistical experimental design methods are employed in optimization. We apply Hocke_D4 experimental designs with five parameters in order to minimize the lock time and the spurious level of a fractional-N synthesizer a...

Field Programmable Gate Arrays (FPGAs) are becoming increasingly popular for use within high integrity and safety critical systems. One commonly used coding language for their configuration is the VHSIC Hardware Description Language (VHDL). Whilst VHDL is used for hardware description, it is developed in a similar way to traditional software, and many safety critical software certification stan...

This paper presents a case study in the formal verification of the hardware description level specification of a general purpose computer processor. The major contributions of this paper are a framework for modelling VHDL hardware designs in the ACL2 language, a discipline for managing the layering of abstractions when verifying a hierarchical design, and a description of the significant theore...

In this paper we present an overview about the object-oriented hardware description language SystemCPlus that is based on SystemC. First we discuss the chances lying in the application of object-oriented techniques for designing hardware. Afterwards we give an introduction into SystemC-Plus’ basic features and depict their use by means of some descriptive examples. And finally we will give a br...

This paper describes an ongoing implementation of an embedded hardware description language (HDL) using Haskell as a host language. Traditionally, “functional” HDL’s are made using lazy lists to model signals, so circuits are functions from lists of input values to lists of output values. We use another known approach for embedded languages, in which circuits are data structures rather than fun...