This paper presents a new security architecture for protecting software confidentiality and integrity. Different from the previous process-centric systems designed for the same purpose, the new architecture ties cryptographic properties and security attributes to memory instead of each individual user process. The advantages of such a memory centric design are many folds. First, it provides a b...

Dual-addressing memory architecture is designed for twodimensional memory access with both row-major and column-major localities. In this paper, we highlight two memory management issues in dual-addressing memory. First, to avoid the external fragmentation, we propose a virtual dual-addressing memory design to enable memory management via operating system. After that, to deal with the size mism...

persian garden design is one of the main elements in the architecture and landscaping in iran and the whole lands influenced by the iranian culture. this phenomenon has always been present in iranians' life and they have had a close connection to this ancient tradition. hence, it can be said that persian garden design is one of the most crucial features in shaping landscape, in particular,...

This brief presents a new P-parallel radix-2 memory-based fast Fourier transform (FFT) architecture. The aim of this work is to reduce the number multiplexers and achieve an efficient memory usage. One advantage proposed architecture that it only needs permutation circuits after memories, which reduces multiplexer usage one per parallel branch. Another calculates same based on perfect shuffle a...

this paper presents a full duplex, real time implementation of itu-t g.723.1 [7,8] speech coder using the tms320c5402 dsp chip which is based on a 16 bit fixed-point architecture. an optimization method is proposed in order to reduce the total necessary cycle time consumed in real-time implementation. the multi-pulse maximum likelihood quantization (mp-mlq) excitation search block which is the ...

The excellent performance of the contemporary x86 processors is partially due to the complexity of their memory architecture, which therefore plays a role in performance engineering efforts. Unfortunately, the detailed parameters of the memory architecture are often not easily available, which makes it difficult to design experiments and evaluate results when the memory architecture is involved...