نتایج جستجو برای: operands

تعداد نتایج: 843  

1998
Ted J. Biggerstaff

Anticipatory Optimization (AO) is a method for compiling compositions of abstract components (which are themselves composite data structures such as arrays, matrices, trees, record composites, etc.) so as to anticipate non-optimal structures in the compiled code (e.g., redundant iterations) and to compile the abstract components directly to optimized code without ever producing the non-optimal ...

2014
H. Siewobr

In this paper, a novel scheme for detecting overflow in Residue Number System (RNS) is presented. A generalized scheme for RNS overflow detection is introduced, followed by a simplified Operands Examination Method for overflow detection for the moduli set . The proposed method detects overflow in RNS addition of two numbers without pre-computing their sum .Moreover, when compared with the best ...

2003
Jean-Michel Muller

We adapt the radix-r digit-recurrence division algorithm to complex division. By prescaling the operands, we make the selection of quotient digits simple. This leads to a simple hardware implementation, and allows correct rounding of complex quotient. To reduce large prescaling tables required for radices greater than 4, we adapt the bipartite-table method to multiple-operand functions.

2003
Masayoshi Fujino Vasily G. Moshnyaga

The design of portable battery-operated devices requires low-power computation circuits. This paper presents a new multiplier-accumulator (MAC) design approach, which in contrast to existing methods exploits dynamic operand transformation to reduce power consumption. The key idea is to compare current values of input operands with previous values and depending on computed Hamming distance to us...

Journal: :IEEE Design & Test of Computers 1997
Michael Nicolaidis Ricardo de Oliveira Duarte Salvador Manich Joan Figueras

units (adders, ALUs, multipliers, dividers) are essential to fault-tolerant computer designs. Some researchers based early design schemes for such units on arithmetic residue codes.1 Others proposed parity prediction schemes for the same purpose.2 These schemes compute the output operand’s parity as a function of the operator’s internal carries and of the input operands’ parities. The basic dra...

Journal: :Microprocessors and Microsystems - Embedded Hardware Design 2011
Zdenka Babic Aleksej Avramovic Patricio Bulic

The paper presents a new multiplier enabling achievement of an arbitrary accuracy. It follows the same idea of number representation as the Mitchell’s algorithm, but does not use logarithm approximation. The proposed iterative algorithm is simple and efficient and its error percentage is as small as required. As its hardware solution involves adders and shifters, it is not gate and power consum...

2007
Paul Cockshott

I. COMPILING TO SIMD PARALLELISM Most commodity microprocessors now support multi-media instructions. These instruction-set extensions are typically based on the Single Instruction-stream Multiple Data-stream (SIMD) model in which a single instruction causes the same mathematical operation to be carried out on many operands, or pairs of operands at the same time. The multi-media instructions on...

Journal: :Journal of Experimental Child Psychology 2021

In the domain of cognitive arithmetic, size effect corresponds to an increase in solution times as a function operands involved problems. this study, we tracked evolution effects associated with tie and non-tie addition problems across development. We scrutinized progression for very small involving from 2 4, larger problems, 1-problems (problems 1 one operands) children Grade 5 adults. For fir...

2013
Denis Teissandier Vincent Delos Lazhar Homri

In tolerance analysis, it is necessary to check that the cumulative defect limits specified for the component parts of a product are compliant with the functional requirements expected of the product. Cumulative defect limits can be modelled using a calculated polytope, the result of a set of intersections and Minkowski sums of polytopes. This article presents a method to be used to determine f...

2009
E. Vassalos D. Bakalis H. T. Vergos

Novel architectures for designing modulo 2+1 subtractors are introduced, for both the normal and the diminished-one number representation of the operands. Zero-handling is also considered in the diminished-one operand representation case. The modulo 2+1 subtractors for operands in the normal representation that are proposed are shown to be more efficient in area, delay and power dissipation tha...

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