This paper focuses on modeling and characterizing the data dependent jitter (DDJ) in high-speed interconnect. The analysis process is performed based on the Fourier series using the interconnect RLC model. By calculating the pattern dependent delay deviations, the DDJ is characterized. To validate the model accuracy, the analysis results have been compared against Cadence simulations. The inter...

A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range of RLC loads. It is shown that the traditional quadratic dependence of the propagation delay on the length of an RC line approaches a linear dependence as inductance effects increase. The closed form delay model is appli...

Linear system theory provides an inadequate characterization of sustained oscillation in nature. In this two-part exposition of oscillation in piecewise-linear dynamical systems, we guide the reader from linear concepts and simple harmonic motion to nonlinear concepts and chaos. By means of three worked examples, we bridge the gap from the familiar parallel RLC network to exotic nonlinear dynam...

cell problem Ω̇ = ǫBΩ + ǫF (t) with an effective matrix B and an explicitly-known F (t). We provide necessary and sufficient condition for the accuracy of the approximation (over a O(ǫ) time-scale), and show how B can be computed (at a cost independent of ǫ). As a direct application, we investigate the possibility of using RLC circuits to harvest the energy contained in small scale oscillations ...

An RLC circuit, certain parameters of which are measured sequentially , that is, one after the other, undergoes signiicant perturbations that aaect its dynamical behavior. By contrast, these perturbations are usually eliminated when the measurements are performed in parallel , that is, when the parameters are measured simultaneously. This result connrms the existence of physical systems with th...

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A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range of RLC loads. It is shown that the traditional quadratic dependence of the propagation delay on the length of an RC line approaches a linear dependence as inductance effects increase. The closed form delay model is appli...

,/ This paper models high-speed VLSI interconnects by using a generic distributed RLC-tree. Through a detailed analysis of the distributed RLC-tree a two-pole approximation system is consequently established to formulate the performance-driven layout in MCM designs. An in-depth study of the formulated performance-driven layout problem reveals the interplay between the interconnector's performan...