Abstract – Modeling of the cascode switching structure used in Flyback converter for achieving fast startup in the deeply dimmed phase-cut LED driver is presented in this paper. The cascode structure’s inherent instability and oscillation issue is modeled and analyzed quantitatively. Three solutions are proposed to stabilize the structure and suppress the unstable voltage oscillation. Solutions...

In the literature, Improved Recycling Folded Cascode (IRFC) Operational Transconductance Amplifier (OTA) is proposed for enhancing the DC gain and the Unity Gain Bandwidth (UGB) of the Recycling Folded Cascode (RFC) OTA. In this paper, an enhanced IRFC (EIRFC) OTA which uses positive feedback at the cascode node is proposed for enhancing the differential mode (DM) gain without changing the unit...

A current mirror (CM) based on self cascode arrangement, useful for low voltage analog and mixed mode circuit is proposed. The CM uses 4 MOSFETs, has high input and output swing, operating at ± 0.5 V supply. Pspice simulations confirm the high performance of this CM having a bandwidth of 2.1 GHz. Resistive and capacitive compensations result in about threefold bandwidth increase to 6.1 GHz.

Cascode CMOS op-amps use a large number of external bias voltages. This results in numerous drawbacks, namely, an area and power overhead, susceptiblity of the bias lines to noise and cross-talk and high sensitivity of the bias point to process variations. In this paper we present a self-biasing technique for folded cascode CMOS op-amps that uses no additional devices and no baas voltages other...

The design of high-accuracy analogue circuits is becoming a difficult task with the scaling down of supply voltages and transistor channel lengths of the current mixed-signal integrated circuits. Most of this kind of circuits require the use of the highestperformance active cell: the operational amplifier (op amp). Designers are continuously working toward tradeoff solutions between gain, input...

An eighth-order switched-current bandpass delta-sigma modulator is described. Simulations indicate that our 1.2pm CMOS implementation will achieve a S N R of 90dB in the band 10 MHzk150 KHz when clocked at 40 MHz. The modulator makes use of a switched-current resonator based on the N-path technique and the resonator employs regulated-cascode current-copiers to simultaneously achieve high speed ...

This paper presents a new common-mode stabilization method for a CMOS differential cascode Class-E power amplifier with LCtank based driver stage. The stabilization method is based on the identification of the poles and zeros of the closed-loop transfer function at a critical node. By adding a series resistor at the common-gate node of the cascode transistor, the right-half-plane poles are move...

This paper presents an improved linearity variable-gain amplifier (VGA) in 0.18-µm CMOS technology. The lineari­ty improvement is resulted from employing a new combinational technique, which utilizes third-order-intermodulation (IM3) cancellation mechanism using second-order-intermodul­ation (­IM2) injection, and intermodulation distortion (IMD) sinking techniques. The proposed VGA gain cell co...